• 한국정보통신설비학회:학술대회논문집
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• 2005.08a
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• pp.128-132
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• 2005

각종 신호의 디지털 전송에서 Modulation기법에 의해 발생되는 PAPR(Peak to Average Power Ratio)은 전송 신호의 선형성을 보장하기 위하여 고출력 증폭기의 Back-off를 요구하게 된다. 이러한 고출력 증폭기의 Back-off요구로 인하여 원하는 출력에 비해 높은 전력소모량이 필요하여 대출력을 요구하는 장비의 소형화는 크게 제한을 받게 된다. 본 논문에서는 PAR을 감소하기 위한 CFR(Crest Factor Reduction)기법을 위성 DMB용 Gap Filler에 적용하여 장비 크기를 소형화한 사례에 대해 소개한다. 전송신호의 품질에 대한 영향을 최소화 하면서 PAR을 감소하기 위한 방안을 위해 도입된 Simulation 결과와 CFR기법을 적용한 장비에 대한 성능시험 결과 및 필드 테스트 결과에 대해 소개한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.86-93
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• 2008

A low-power, low-noise, highly-linear hybrid balun circuit is proposed for 2.4-GHz fully differential CMOS direct conversion receivers. The hybrid balun is composed of a passive transformer and loss-compensating auxiliary amplifiers. Design issues regarding the optimal signal splitting and coupling between the transformer and compensating amplifiers are discussed. Implemented in $0.18{\mu}m$ CMOS process, the 2.4 GHz hybrid balun achieves 2.8 dB higher gain and 1.9 dB lower noise figure than its passive counterpart and +23 dBm of IIP3 only at a current consumption of 0.67 mA from 1.2 V supply. It is also examined that the hybrid balun can remarkably lower the total noise figure of a 2.4 GHz fully differential RF receiver only at a cost of 0.82 mW additional power dissipation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.12
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• pp.1339-1349
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• 2008

In this paper, a nonlinear relationship between an input complex envelope and an output complex envelope of m-th harmonic zone is theoretically analyzed, and AM/$AM_m$ and AM/$PM_m$ are defined. A scheme to extract these characteristics from measured in-phase and quadrature-phase data is suggested. The proposed analysis is verified with a fundamental-fundamental and fundamental-third harmonic measurements for a InGaP power amplifier(PA). Based on the harmonic-band nonlinear analysis and extraction scheme, a new technique to send a signal in m-th harmonic band with a harmonic signal Linearization Digital Predistortion(DPD) scheme is presented. A numerical analysis and a Look-Up Table(LUT) based DPD algorithms to linearize output signal on m-th harmonic zone are developed. For a 16- and a 64-QAM input signals, a DPD for third harmonic signal linearization is implemented, and output spectrum and signal constellation are measured. The wholly distorted signals are linearized, and thus the measured Error Vector Magnitudes (EVM) are 6.4 % and 6.5 % respectively. The results show that a proposed scheme linearizes a nonlinearly distorted harmonic band signals. The proposed nonlinear analysis and predistortion scheme can be applied to multiband transmitter in next generation software defined radio(SDR)/cognitive radio(CR) wireless system.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.218-222
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• 2008

RF power amplifier requires linearization in order to reduce adjacent channel interference. And most of the existing linearization algorithms assume that a PA has memory-less nonlinearity. But for the wider bandwidth signal, the memory effect of PA cannot be ignored. This paper investigates digital pre-distortion by use of a memory polynomial model which compensates for amplifier nonlinearity and memory effect. The look-up table based implementation scheme is used to reduce the computational complexity of the pre-distortion block. The linearization performance is demonstrated on wideband CDMA signal and class AB high power amplifier.

• Journal of Satellite, Information and Communications
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• v.10 no.4
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• pp.101-106
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• 2015

In this paper, a shared band transmission, in which downlink signals from satellite to both earth station and user terminal are transmitted in the same frequency band, is considered. For proper operation of such shared band transmission, self-interference caused by the transmitted signal from its own transmitter should be cancelled and the desired signal from the other transmitter should be obtained. The self-interference is sent by its own transmitter and it can be easily regenerated with the estimated round-trip delay. In addition to this delay, non-linearity effects caused by power amplifiers at the earth station and satellite should be exploited. The proposed interference canceller divided into two parts: one is subtraction of the transmitted signal with delay and non-linearity effects, and the other is adoptive filter to suppressed the residual interference. Through computer simulations, the effectiveness of the proposed system is verified.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.1-8
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• 2013

This paper presents a variable gain amplifier(VGA) without passive devices. This VGA employes the architecture of current feedback amplifier and variable gain can be achieved by using the GM ratios of two trans-conductance(gm) circuits. To obtain linearity and high gain, it uses current division technique and source degeneration in feedback GM circuits. Input trans-conductance(GM) circuit was biased by using a tunable voltage controller to obtain variable gain. The prototype of the VGA is designed in $0.35{\mu}m$ CMOS technology and it is operating in sub-threshold region for low power consumption. The the gain of proposed VGA is varied from 23dB to 43dB, and current consumption is $2.82{\mu}A{\sim}3{\mu}A$ at 3.3V. The area of VGA is 1$120{\mu}m{\times}100{\mu}m$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.4
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• pp.290-298
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• 2018

Herein, an S-band internally-matched power amplifier that shows a power capability of 300 W in a Long Term Evolution(LTE) band 7 is designed and fabricated using a CGHV40320D GaN HEMT from Wolfspeed. Based on the nonlinear model, the optimum source and load impedance are extracted from the source-pull and load-pull simulations at the fundamental and harmonic frequencies, and the harmonic impedance tuning circuits are implemented inside a ceramic package. The internally matched power amplifier, which is fabricated using a thin-film substrate with a high relative permittivity of 40 and an RF35TC PCB substrate, is measured at the pulsed condition with a pulse period of 1 ms and a duty cycle of 10%. The measured results show a maximum output power of 257~323 W, a drain efficiency of 64~71%, and a power gain of 11.5~14.0 dB at 2.62~2.69 GHz. The LTE-based measurement shows a drain efficiency of 42~49% and an ACLR of less than -30 dBc(excluding 2.62 GHz) at an average power of 79 W.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12A
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• pp.1932-1938
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• 1999

In this paper, planar duplexer module combined with power amplifier is described. This new scheme is to enhance power efficiency as well as to minimize the size of RF circuit in CDMA phone. Each filter which was a part of duplexer, was realized with planar type and rearranged into the power amplifier module on the multilayer board. Each electrical specifications of existing power amplifier and duplexer were satisfied. Especially, ACPR performances measured at output power of 24dBm which is 2dB lower than that of a conventional one, meet IS-95 for a power amplifier of CDMA phone. Overall current about 80mA has been successfully saved as a result of new scheme. In addition, the module size has been reduced to be as small as 1.08CC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1137-1140
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• 2011

In this paper, the optimal condition for efficient active frequency multipliers is analyzed. This analysis is based on the effects from transistor nonlinear coefficients, harmonic impedances, and output parasitic components. From the analysis, normalized harmonic power is estimated with the clipping condition of a commercial transistor, and the condition for high conversion efficiency is suggested. From the analysis, a class-F frequency tripler was implemented for the output at 2.475 GHz, showing the maximum efficiency of 22.9 % and the maximum conversion gain of 9.5 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.8A
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• pp.583-591
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• 2009

OFDM(orthogonal frequency division multiplexing) signal with high PAPR(peak to average power ratio) produces the nonlinear distortion and/or decreases down the power efficiency of HPA(high power amplifier). So, the IMD(inter-modulation distortion) reduction method was proposed to reduce the nonlinear distortion, which shows better BER(bit error rate) performance than the PAPR reduction methods. However, IMD reduction method has inherent problem which system complexity and processing time increases because the FFT(fast Fourier transform) processor is added in transmitter and decision criterion of IMD reduction method is computed in frequency domain,. In this paper, therefore, we propose a new IMD reduction method to reduce the computational complexity and structure of IMD computation. And we apply this proposed method into OFDM system using PTS(partial transmit sequence) scheme and compare the computational complexity between conventional and proposed IMD reduction method. This method can reduce the system size and computational complexity. Also, the proposed has almost same BER performance with the conventional IMD reduction method.