• Title/Summary/Keyword: 본딩 공정

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Warpage and Stress Simulation of Bonding Process-Induced Deformation for 3D Package Using TSV Technology (TSV 를 이용한 3 차원 적층 패키지의 본딩 공정에 의한 휨 현상 및 응력 해석)

  • Lee, Haeng-Soo;Kim, Kyoung-Ho;Choa, Sung-Hoon
    • Journal of the Korean Society for Precision Engineering
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    • v.29 no.5
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    • pp.563-571
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    • 2012
  • In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

Wafer-Level MEMS Capping Process using Electrodeposition of Ni Cap and Debonding with SnBi Solder Layer (Ni 캡의 전기도금 및 SnBi 솔더 Debonding을 이용한 웨이퍼 레벨 MEMS Capping 공정)

  • Choi, J.Y.;Lee, J.H.;Moon, J.T.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.4
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    • pp.23-28
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    • 2009
  • We investigated the wafer-level MEMS capping process for which cavity formation in Si wafer was not required. Ni caps were formed by electrodeposition on 4" Si wafer and Ni rims of the Ni caps were bonded to the Cu rims of bottom Si wafer by using epoxy. Then, top Si wafer was debonded from the Ni cap structures by using SnBi layer of low melting temperature. As-evaporated SnBi layer was composed of double layers of Bi and Sn due to the large difference in vapor pressures of Bi and Sn. With keeping the as-evaporated SnBi layer at $150^{\circ}C$ for more than 15 sec, SnBi alloy composed of eutectic phase and Bi-rich $\beta$ phase was formed by interdiffusion of Sn and Bi. Debonding between top Si wafer and Ni cap structures was accomplished by melting of the SnBi layer at $150^{\circ}C$.

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Reliability of COF Flip-chip Package using NCP (NCP 적용 COF 플립칩 패키지의 신뢰성)

  • Min, Kyung-Eun;Lee, Jun-Sik;Jeon, Je-Seog;Kim, Mok-Soon;Kim, Jun-Ki
    • Proceedings of the KWS Conference
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    • 2010.05a
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    • pp.74-74
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    • 2010
  • 모바일 정보통신기기를 중심으로 전자패키지의 초소형화, 고집적화를 위해 플립칩 공법의 적용이 증가되고 있는 추세이다. 플립칩 패키징 접합소재로는 솔더, ICA(Isotropic Conductive Adhesive), ACA(Anisotropic Conductive Adhesive), NCA(Non Conductive Adhesive) 등과 같은 다양한 접합소재가 사용되고 있다. 최근에는 언더필을 사용하는 플립칩 공법보다 미세피치 대응성을 위해 NCP를 이용한 플립칩 공법에 대한 요구가 증가되고 있는데, NCP의 상용화를 위해서는 공정성과 함께 신뢰성 확보가 필요하다. 본 연구에서는 LDI(LCD drive IC) 모듈을 위한 COF(Chip-on-Film) 플립칩 패키징용 NCP 포뮬레이션을 개발하고 이를 적용한 COF 패키지의 신뢰성을 조사하였다. 테스트베드는 면적 $1.2{\times}0.9mm$, 두께 $470{\mu}m$, 접속피치 $25{\mu}m$의 Au범프가 형성된 플리칩 실리콘다이와 접속패드가 Sn으로 finish된 폴리이미드 재질의 flexible 기판을 사용하였다. NCP는 에폭시 레진과 산무수물계 경화제, 이미다졸계 촉매제를 사용하여 다양하게 포뮬레이션을 하였다. DSC(Differential Scanning Calorimeter), TGA(Thermogravimetric Analysis), DEA(Dielectric Analysis) 등의 열분석장비를 이용하여 NCP의 물성과 경화거동을 확인하였으며, 본딩 후에는 보이드를 평가하고 Peel 강도를 측정하였다. 최적의 공정으로 제작된 COF 패키지에 대한 HTS (High Temperature Stress), TC (Thermal Cycling), PCT (Pressure Cooker Test)등의 신뢰성 시험을 수행한 결과 양산 적용 가능 수준의 신뢰성을 갖는 것을 확인할 수 있었다.

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A Study on the Computational Design and Analysis of a Die Bonder for LED Chip Fabrication (LED칩 제조용 다이 본더의 전산 설계 및 해석에 대한 연구)

  • Cho, Yong-Kyu;Lee, Jung-Won;Ha, Seok-Jae;Cho, Myeong-Woo;Choi, Won-Ho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.8
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    • pp.3301-3306
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    • 2012
  • In LED chip packaging, die bonding is a very important process which fixes the LED chip on the lead frame to provide enough strength for the next process. Conventional pick-up device of the die bonder is simply operated by up and down motion of a collet and an ejector pin. However, this method may cause undesired problems such as position misalignment and/or severe die damage when the pick-up device reaches the die. In this study, to minimize the position alignment error and die damage, a die bonder is developed by adopting a new pick-up head for precise alignment and high speed feeding. To evaluate structural stability of the designed system, required finite element model of the die bonder is generated, and structural analysis is performed. Vibration analysis of the pick-up head is also performed using developed finite element model at operation frequency range. As a result of the analysis, deformation, stress, and natural frequency of the die bonder are investigated.

Reflow Behavior and Board Level BGA Solder Joint Properties of Epoxy Curable No-clean SAC305 Solder Paste (에폭시 경화형 무세정 SAC305 솔더 페이스트의 리플로우 공정성과 보드레벨 BGA 솔더 접합부 특성)

  • Choi, Han;Lee, So-Jeong;Ko, Yong-Ho;Bang, Jung-Hwan;Kim, Jun-Ki
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.1
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    • pp.69-74
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    • 2015
  • With difficulties during the cleaning of reflow flux residues due to the decrease of the part size and interconnection pitch in the advanced electronic devices, the need for the no-clean solder paste is increasing. In this study, an epoxy curable solder paste was made with SAC305 solder powder and the curable flux of which the main ingredient is epoxy resin and its reflow solderability, flux residue corrosivity and solder joint mechanical properties was investigated with comparison to the commercial rosin type solder paste. The fillet shape of the cured product around the reflowed solder joint revealed that the curing reaction occurred following the fluxing reaction and solder joint formation. The copper plate solderability test result also revealed that the wettability of the epoxy curable solder paste was comparable to those of the commercial rosin type solder pastes. In the highly accelerated temperature and humidity test, the cured product residue of the curable solder paste showed no corrosion of copper plate. From FT-IR analysis, it was considered to be resulted from the formation of tight bond through epoxy curing reaction. Ball shear, ball pull and die shear tests revealed that the adhesive bonding was formed with the solder surface and the increase of die shear strength of about 15~40% was achieved. It was considered that the epoxy curable solder paste could contribute to the improvement of the package reliability as well as the removal of the flux residue cleaning process.

Impedance and Read Power Sensitivity Evaluation of Flip-Chip Bonded UHF RFID Tag Chip (플립-칩 본딩된 UHF RFID 태그 칩의 임피던스 및 읽기 전력감도 산출방법)

  • Yang, Jeenmo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.4
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    • pp.203-211
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    • 2013
  • UHF RFID tag designers usually ndde the chip impedance and read power sensitivity value obtained when a tag chip is mounted on a chip pad. The chip impedance, however, is not able to be supplied by chip manufacturer, since the chip impedance is varied according to tag designs and fabrication processes. Instead, the chip makers mostly supply the chip impedances measured on the bare dies. This study proposes a chip impedance and read power sensitivity evaluation method which requires a few simple auxiliary and some RF measuring equipment. As it is impractical to measure the chip impedance directly at mounted chip terminals, some form test fixture is employed and the effect of the fixture is modeled and de-embeded to determine the chip impedance and the read power sensitivity. Validity and accuracy of the proposed de-embed method are examined by using commercial RFID tag chips as well as a capacitor and a resistor the value of which are known.

Encapsulation of an 2-methyl Imidazole Curing Accelerator for the Extended Pot Life of Anisotropic Conductive Pastes (ACPs) (이방 도전성 페이스트의 상온 보관성 향상을 위한 Imidazole 경화 촉매제의 Encapsulation)

  • Kim, Ju-Hyung;Kim, Jun-Ki;Hyun, Chang-Yong;Lee, Jong-Hyun
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.4
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    • pp.41-48
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    • 2010
  • To improve the pot life of one-part in-house anisotropic conductive paste (ACP) formulations, 2-methyl imidazole curing accelerator powders were encapsulated with five agents. Through measuring the melting point of the five agents using DSC, it was confirmed that a encapsulation process with liquid-state agents is possible. Viscosity of ACP formulations containing the encapsulated imidazole powders was measured as a function of storage time from viscosity measurements. As a result, pot life of the formulations containing imidazole powders encapsulated with stearic acid and carnauba wax was improved, and these formulations indicated similar curing behaviors to a basic formulation containing rare imidazole. However, the bondlines made of these formulations exhibited low average shear strength values of about 37% level in comparison with the basic formulation.

플라즈마 표면처리시 산소 분율의 변화가 기판의 표면에너지와 코팅층과의 계면 부착 특성에 미치는 영향

  • Kim, Dong-Yong;Bae, Gwang-Jin;Kim, Jong-Gu;Ju, Jae-Hun;Jo, Yeong-Rae
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.110-110
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    • 2015
  • 표면에너지는 계면특성을 지배하는 핵심인자로 디스플레이의 터치 스크린 패널 공정, 이종소재의 접합, 금속의 클래딩 등 실제 산업에 있어서 매우 중요하다. 표면에너지는 코팅과 본딩 이론에 있어서 기본이 되는 물리량으로 표면에너지가 높을수록 코팅 또는 박막 증착시 코팅, 증착이 용이하며 이종소재의 접합도 쉽게 일어난다. 본 연구에서는 플라즈마 표면처리시 산소 분율의 변화에 따른 기판의 표면에너지와 코팅층과 기판의 부착력의 변화에 대해 연구하였다. 연구의 주요 기판으로 ITO, PET 기판을 사용하였고, 표면 에너지 변화를 확인하기 위해 기판을 상온 상압 플라즈마에 노출시켰다. 플라즈마는 아르곤(Ar)의 공급량을 20 LPM으로 고정하고 산소($O_2$)의 공급량을 0 sccm에서 40 sccm 까지 10 sccm 간격으로 변수를 주었다. 표면에너지 값은 기판 위에 형성된 액체의 접촉각을 통해 도출하였다. 표면에너지 측정 액체로 증류수(deionized water)와 디오도메탄(diiodo-methane)을 사용하였다. 표면에너지는 산소분압이 10 sccm에서 최대값인 76 mJ/m2으로 증가한 후 20 sccm까지 유지하다 다시 직선적으로 감소하였다. 기판에 증착된 크롬 박막의 부착력은 스크래치 테스트를 통해 측정하였다. 표면에너지의 증가와 비례하게 부착력은 증가하였고 표면에너지가 감소하는 범위에서는 부착력도 감소하였다. 기판과 코팅층의 부착력 증가 원인 중 하나인 계면 산화물 층의 생성 여부를 알아보기 위해 auger electron spectroscopy (AES) 분석을 진행하였다. AES 분석을 통해 플라즈마 표면처리시 기판과 코팅층의 계면 산화물층의 두께가 표면에너지의 변화와 비례하게 증가하였다가 감소하는 것을 확인하였다. 산소분압이 10 sccm 이었을 경우 산화물층의 두께가 가장 두꺼웠다. 또한 계면의 화학적 결합 상태를 알아보기 위해 X-ray photoelectron spectroscopy (XPS) 분석을 진행하였으며 산소 분율의 변화에 따라 크롬 산화물의 양이 증가하였다 감소하는것을 확인하였다. 이 연구를 통해 산소를 포함한 플라즈마 표면개질이 기판과 코팅층의 부착력 증가에 영향을 끼침을 확인 할 수 있었다. 또한 이를 응용하여 부착력 증가가 필요한 다양한 분야에서도 쉽게 적용시킬 수 있을 것이다.

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A Study on the Assembly Process and Reliability of COF (Chip-On-Flex) Using ACFs (Anisotropic Conductive Films) for CCM (Compact Camera Module) (ACF를 이용한 CCM (Compact Camera Module)용 COF(Chip-On-Flex) 실장 기술 및 신뢰성 연구)

  • Chung, Chang-Kyu;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.7-15
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    • 2008
  • In this paper, the Chip-On-Flex (COF) assembly process using anisotropic conductive films (ACFs) was investigated and the reliability of COF assemblies using ACFs was evaluated. Thermo-mechanical properties of ACFs such as coefficient of thermal expansion (CTE), storage modulus (E'), and glass transition temperature $(T_g)$ were measured to investigate the effects of ACF material properties on the reliability of COF assemblies using ACFs. In addition, the bonding conditions for COF assemblies using ACFs such as time, temperature, and pressure were optimized. After the COF assemblies using ACFs were fabricated with optimized bonding conditions, reliability tests were then carried out. According to the reliability test results, COF assemblies using the ACF which had lower CTE and higher $T_g$ showed better thermal cycling reliability. Consequently, thermo-mechanical properties of ACFs, especially $T_g$, should be improved for high thermal cycling reliability of COF assemblies using ACFs for compact camera module (CCM) applications.

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The study of the packaging for Ti:LiN$bO_3$optical modulator device and its electrical and optical characteristics (Ti:LiN$bO_3$ 광변조기 소자의 패키징 및 전기.광학적 특성)

  • 윤형도;김성구;이한영;윤대원
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.6
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    • pp.72-78
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    • 1998
  • An optical modulator Ti:LiNbO$_3$optical waveguide and CPW electrode structure were fabricated. The optical modulator was packaged using components such as ferrules, dirmy LN block and glass, vibration and shock absorbption pad, and alumina feeder through processings of pigtailing. Au wire bonding, epoxing, SMA connecting, sealing. The electrical and optical characteristics were measured after packaging. The electrical properties of S$_{21}$ and S$_{11}$ were obtained as 9.8 GHz at -3 dB and -8.9dB at 14.4GHz, respectively. Optical waveguide prepared met requirements for a single mode at a 1550nm wavelength range. Insertion loss was 4.3dB at room temperature after packaging, and was varied 4.3~6.4dB at various temperatures, 5~45$^{\circ}C$. E-O bandwidth measurement showed 3dB optical response at 7.8GHz, which means that it is applicable for 10Gbps optical communicationon

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