• Title/Summary/Keyword: 병렬 시뮬레이션

Search Result 754, Processing Time 0.027 seconds

Islanding Detection under Grid-connected Inverter Parallel Operation (계통연계형 인버터 병렬운전 상황에서의 단독운전 검출)

  • Jo, Yeong-Min;Kim, Dong-Gyun;Cho, Sang-Yoon;Choy, Ick;Lee, Young-Kwoun;Choi, Ju-Yeop
    • Proceedings of the KIPE Conference
    • /
    • 2015.11a
    • /
    • pp.19-20
    • /
    • 2015
  • 기존의 단독운전 검출기법들은 인버터 병렬운전 상황에 대한 성찰이 부족하다고 여겨진다. 따라서 본 논문에서는 인버터가 병렬운전되는 상황에서도 단독운전 검출이 가능한 검출기법을 제안하고 시뮬레이션과 실험을 통하여 검증한다.

  • PDF

The Development of a MATLAB-based Discrete Event Simulation Framework for the Engagement Simulations of the Weapon Systems (무기체계 교전 시뮬레이션을 위한 매트랩 기반 이산사건시뮬레이션 프레임워크의 개발)

  • Hwang, Kun-Chul;Lee, Min-Gyu;Kim, Jung-Hoon
    • Journal of the Korea Society for Simulation
    • /
    • v.21 no.2
    • /
    • pp.31-39
    • /
    • 2012
  • Simulation Framework is a basic software tool used to develop simulation applications. This paper describes the development of a discrete event simulation framework based on DEVS(Discrete EVent System Specification) formalism, using MATLAB language which is widely used in technical computing and engineering disciplines. The newly developed framework utilizing MATLAB object oriented programming combines the convenience of MATLAB language and the sophisticated architecture of the DEVS formalism. Hence, it supports the productivity, flexibility, extensibility that are required for the simulation application software development of the weapon systems engagement. Moreover, it promises a simulation application the increased the computation speed proportional to the number of CPU of a multi-core processor, providing the batch simulation functionality based on MATLAB parallel computing technology.

Fast Execution of Monte Carlo Simulation with Random Walk (무작위 행보 방식의 몬테 칼로 시뮬레이션의 고속화)

  • Jeong, Ye-chan;Ryu, Seung-yo;Kim, Dongseung
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2015.10a
    • /
    • pp.204-207
    • /
    • 2015
  • 이 연구는 공학 및 실험과학에서 활용되는 몬테 칼로 시뮬레이션 기법 중 하나인 무작위 행보 알고리즘의 성능 개선을 목표로 하였다. 이를 위해 무작위 행보 과정에서 난수 발생부와 행보 진행부를 분리하여 처리 시간을 단축하는 방안과, 문제 영역의 계산 규모를 2단계로 분할하여 시뮬레이션의 수렴 속도를 향상 시키는 방안을 제안한다. 또한 대규모 문제를 병렬처리 가능하도록 구현하고, 서로 다른 작업 분할 방식을 혼합하여 최적화를 수행 하였다. 순차 알고리즘만으로 실험한 결과 단순 구현방법과 비교해 실행시간과 에너지 소모량이 각각 18%의 성능향상을 얻었으며, 병렬 알고리즘을 8개의 노드(16코어)의 클러스터에서 실행했을 때 행 분할 방식의 성능이 블록 분할 방식보다 8% 빨라지는 것을 확인하였다.

A Methodology to Simulate I/O-Intensive Applications (I/O 집약적인 응용의 시뮬레이션 방법론)

  • Eom, Hyeon-Sang
    • The KIPS Transactions:PartA
    • /
    • v.13A no.5 s.102
    • /
    • pp.445-454
    • /
    • 2006
  • We introduce a family of simulators for I/O-intensive distributed or parallel applications, and a methodology that permits selecting the most efficient simulator meeting a given user-defined accuracy requirement. This methodology consists of a series of tests to choose an appropriate simulation based on the attributes of the application. In addition, each simulator provides two estimates of application execution time: the minimum expected time and the maximum. We present the results of applying our methodology to existing applications, and show that we can accurately simulate applications tens to hundreds of tunes faster than the application execution times.

Performance Analysis of Sequential and Parallel Interworking Model for Connection Control of VB5.2 Interface (VB5.2 인터페이스의 연결 제어를 위한 순차형 및 병렬형 연동 방식의 성능 분석)

  • Kim, Choon-Hee;Cha, Young-Wook;Han, Ki-Jun
    • The Transactions of the Korea Information Processing Society
    • /
    • v.7 no.9
    • /
    • pp.2948-2957
    • /
    • 2000
  • A broadband access network in B- ISDN subscriber network, plays a role of concentration or multiplexing of various subscribers into a service node. To establish an end-to-end ATM connection, interworking functions between \'B5.2 interface's connection protocol and the signalling protocol, are perfonned at the service node. A sequential interworking model and a parallel interworking model were proposed for these interworking functions. The sequential interworking model proceeds the signalling protocol of network node after the response of VB5.2 interface protocol. On the other hand, the parallel interworking model proceeds the signalling protocol and the VB5.2 interface protocol simultaneously. In this paper, we analyze and simulate above two interworking models in tenns of a connection setup delay and completion ratio, when call requests with eBR and VBR transfer capability arrive at the service node. We observed that the completion ratios of the two interworking models are quite closed. However the connection setup delay of parallel interworking model is improved by about 33% compared with that of the sequential interworking model.

  • PDF

Development of High Performance Massively Parallel Processing Simulator for Semiconductor Etching Process (건식 식각 공정을 위한 초고속 병렬 연산 시뮬레이터 개발)

  • Lee, Jae-Hee;Kwon, Oh-Seob;Ban, Yong-Chan;Won, Tae-Young
    • Journal of the Korean Institute of Telematics and Electronics D
    • /
    • v.36D no.10
    • /
    • pp.37-44
    • /
    • 1999
  • This paper report the implementation results of Monte Carlo numerical calculation for ion distributions in plasma dry etching chamber and of the surface evolution simulator using cell removal method for topographical evolution of the surface exposed to etching ion. The energy and angular distributions of ion across the plasma sheath were calculated by MC(Monte Carlo) algorithm. High performance MPP(Massively Parallel Processing) algorithm developed in this paper enables efficient parallel and distributed simulation with an efficiency of more than 95% and speedup of 16 with 16 processors. Parallelization of surface evolution simulator based on cell removal method reduces simulation time dramatically to 15 minutes and increases capability of simulation required enormous memory size of 600Mb.

  • PDF

Design of a Low Power Consumption Accumulator for Parallel Correlators in Spread Spectrum Systems (대역확산 시스템용 병렬 상관기를 위한 저 전력 누적기 설계)

  • Ryoo, Keun-Jang;Chong, Jong-Wha
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.36C no.12
    • /
    • pp.27-35
    • /
    • 1999
  • In a typical spread spectrum system, parallel correlator occupies a large fraction of power consumption because of the large number of accumulators in the system. In this paper, a novel accumulator is proposed that can reduce the power consumption in the parallel correlator. The proposed accumulator counts the numbers of 1 of the incoming input data. The counted values are weighted and added together to obtain the final correlation value only at the end of the accumulation. The proposed accumulator has been designed and simulated by CADENCE Verilog-XL and synthesized by SYNOPSYS Design Compiler with $0.6{\mu}m$ standard cell library. Power consumption results have been obtained from EPIC PowerMill simulations. Simulation results are very encouraging. First, the power dissipation is reduced by 22% and the maximum operating frequency is increased by 323%. In addition, the parallel correlator using the proposed accumulators consumed less power than the conventional active parallel correlators by 22%, and less power than the conventional passive correlator by 43%.

  • PDF

Characteristics of a Parallel Interworking Model for Open Interface of Optical Internet (광 인터넷의 개방형 인터페이스를 위한 병렬형 연동 모델의 특성)

  • Kim, Choon-Hee;Baek, Hyun-Gyu;Cha, Young-Wook;Choi, Jun-Kyun
    • Journal of KIISE:Information Networking
    • /
    • v.29 no.4
    • /
    • pp.405-411
    • /
    • 2002
  • Open interfaces in the optica] Internet have been progressed by OIF's ISI, ITU-T ASTN's CCI and IETF's GSMP extensions with optical switching. These open interfaces enable the separation between the control plane and the optical transport plane. This separation allows flexibility in the network, but it suffers more setup delay than the traditional switch-by-switch connection setup. We propose the parallel interworking model, which will reduce the connection setup delay in the open interface of optical Internet. Based on the switch controller's caching capability about networks states, the parallel interworking procedures between signaling protocol and GSMP protocol are performed in the switch controller. We simulated and evaluated our proposed parallel interworking model and the existing sequential interworking model in terms of a connection setup delay and a completion ratio. We observed that the completion ratios of the two interworking models were quite close. However the connection setup delay of parallel interworking model is improved by about 30% compared with that of the sequential interworking model.

A Study on the CAM Designed by Adopting Best-Match Method using Parallel Processing Architecture (병렬 처리 구조를 이용한 최적 정합 방식 CAM 설계에 관한 연구)

  • 김상복;박노경;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.19 no.6
    • /
    • pp.1056-1063
    • /
    • 1994
  • In this paper a content addressable memory (CAM) is designed by adopting best-match method. It has a single processing element(PE) architecture with high computational efficiency and throughput. It is composed of three main functional blocks(input MUX, best-match CAM, control part). It support fully parallel processing. Logic simulation is completed by using QUICKSIM, Circuit simulation is performanced by using HSPICE. Its layout is based on the ETRI 3 m n-well process design rules. Its maximum operating frequency is 20 MHz.

  • PDF

Research for parallel operation the synchomous machine by a synchronous switch voltage detection (동기스위치 전압검출에 의한 동기기 병렬구동에 대한 연구)

  • Kim, Sun-pil;Lee, Seung-yeol;Hwang, Jung-gu;Kang, Feel-soon;Park, Sung-jun
    • Proceedings of the KIPE Conference
    • /
    • 2015.07a
    • /
    • pp.431-432
    • /
    • 2015
  • 본 논문은 연구자석 동기발전기의 병렬운전을 위한 동기 스위치 전압 검출에 의한 동기기 병렬구동에 관한 연구이다. 동기 스위치 전압검출은 동기기가 병렬구동 시, 스위치의 양단의 전압을 검출하고, 전위차가 0[V]에 근접하게 되면 스위치를 ON시켜 계통과 연계를 위해 본 논문에서 제안하는 기법이다. 제안된 기법은 각 동기기의 동일한 한 상(phase)의 정보를 통하여 병렬구동이 가능하다는 장점이 있다. 따라서 본 논문에서는 제안된 기법에 대하여 시뮬레이션을 통하여 그 타당성을 검증한다.

  • PDF