• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.11
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• pp.5452-5457
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• 2012

It is saving material cost and construction cost by replacing conventional building materials, and It has advantages for aesthetic value. In the Europe, the United States, Japan and other country research about BIPV is actively being carried out and marketability is also being infinity expanding. Arch type PV systems efficiency characteristics is different depending on PV array's directly connection, parallel connection and arches angle, but is a lack of analysis on this nowadays. When the arch type PV system design up, they consider about aesthetic value and they didn't consider about generation efficiency. In this paper, we try to improve the efficiency through optimization of arch type PV system and estimation of the efficiency parameters of the arch type PV system, such as latitude, longitude, temperature, insolation, arch angle and each kind loss from system organization. For improving Arched PV system efficiency, proposed multiple control inverter system, and using simulation tool of Arched PV system "Solar pro", flat-plate type and many arch type PV system configuration the driving characteristics were compared and analyzed.

• Journal of IKEEE
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• v.16 no.3
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• pp.217-223
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• 2012

This paper presents design and operational characteristics of 150 MW pulse power system for high current pulse forming network to control trigger time. The system is composed of two capacitor bank modules. Each capacitor bank module consist of a trigger vacuum switch, 9k 33kJ capacitor, an energy dump circuit, a crowbar circuit and a pulse shaping inductor and is connected in parallel. It is controlled by trigger controller to select operational module and determine triggering time. Pspice simulation was conducted about determining parameters of components such as crowbar circuit, capacitor, pulse forming inductor, trigger vacuum switch and predicting results of experiment circuit. The result of the experiment was in good agreement with the result of the simulation. The various current shapes with 300~650 us pulse width is formed by sequential firing time control of capacitor bank module. The maximum current is about 40 kA during simultaneous triggering of two capacitor bank modules. The developed 150 MW pulse power system can be applied to high current pulse power system such as rock fragmentation power sources, Rail gun, Coil gun, nano-powers, high power microwave.

• Journal of the Korean Society for Railway
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• v.19 no.6
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• pp.727-735
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• 2016

Smart transformers are effective at reducing the weight and increasing the efficiency of traction systems for railroad applications. A smart transformer generally consists of rectifier modules and the Dual-Active-Bridge (DAB) converter modules. The efficiency of the smart transformer depends on not only the electrical characteristics, but also on the control method of the converter modules. Especially, a DAB converter has a high order degree of freedom of voltage modulation to control the power transferred through the high frequency transformer, and a voltage modulation method, are very critical for the efficiency of the DAB converter. This paper proposes a new voltage modulation method for the DAB converter to increase the efficiency in the low/medium power transfer condition. The proposed modulation method controls the reactive power in the high frequency transformer, making it zero. And, the switching loss is dramatically reduced by using the received converter module as a diode rectifier. The feasibility of the proposed modulation method is verified by computer simulation of the 900Vdc DAB converter power control.

• Journal of Advanced Navigation Technology
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• v.6 no.1
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• pp.17-26
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• 2002

In this paper, we have analyzed the BER (Bit Error Rate) performance of multi-user detectors employing SIC(Successive Interference Cancellation) and PIC (Parallel Interference Cancellation) which are the representative schemes in the subtractive interference cancellation. We have considered the MUD structure employing HIC (Hybrid Interference Cancellation) which combines SIC with PIC scheme, and then analyzed the BER performance. We have evaluated the BER performance of SIC and HIC schemes which execute the soft decision to generate the tentative data bit for the purpose of the interference cancellation in MAI and noise environments. Through the numerical analysis and computer simulation, it is shown that HIC can remove the effect of MAI more efficiently than the others, that improve the BER performance and increase the capacity of DS-CDMA systems regardless of the power control conditions. The reason is that the SIC scheme in front of HIC can solve the near-far problem caused by the imperfect power control and PIC scheme in the rear of it can improve the performance much more.

• 전자공학회논문지 IE
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• v.47 no.4
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• pp.18-27
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• 2010

This paper is designed the efficient Data Acquisition System for an vibration of rotatory machines. The Data Acquisition System is consist of the analog logic having signal filer and amplifier, and digital logic with ADC, DSP, FPGA and FIFO memory. The vibration signal of rotatory machines acquired from sensors is controlled by the FPGA device through the analog logic and is saved to FIFO memory being converted analog to digital signal. The digital signal process is performed by the DSP using the vibration data in FIFO memory. The vibration factor of the rotatory machinery analysis and diagnosis is defined the RMS, Peak to Peak, average, GAP, FFT of vibration data and digital filtering by DSP, and is need to follow as being happened the event of vibration and make an application to an warning system. It takes time to process the several analysis step of all vibration data and the event follow, also special event. It should be continuously performed the data acquisition and the process, however during processing the input signal the DSP can not be performed to the acquisited data after then, also it will be lose the data at several channel. Therefore it is that the system uses efficiently the DSP and FPGA devices for reducing the data lose, it design to process a part of the signal data to FPGA from DSP in order to minimize the process time, and a process to parallel process system, as a result of design system it propose to method of faster process and more efficient data acquisition system by using DSP and FPGA than signal DSP system.

• Journal of the Korean Society of Safety
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• v.11 no.2
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• pp.150-159
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• 1996

In this paper, an A-team(Asynchronous Team ) based approach for Reactive power and volage control considering static security assessment in a power system with infrastructural deficiencies is proposed. Reactive power and voltage control problem is the one of optimally establishing voltage level given several constraints such as reactive generation, voltage magnitude, line flow, and other switchable reactive power sources. It can be formulated as a mixed-integer linear programming(MILP) problem without deteriorating of solution accuracy to a certain extent. The security assessment is to estimate the relative robustness of the system in Its present state through the evaluation of data provided by security monitoring. Deterministic approach based on AC load flow calculations is adopted to assess the system security, especially voltage security. A security metric, as a standard of measurement for power system security, producting a set of discrete values rather than binary values, is employed. In order to analyze the above two problems, reactive power/voltage control problem and static security assessment problem, in an integrated fashion for real-time operations, a new organizational structure, called an A-team, is adopted. An A-team is an organization for agents which ale all autonomeus, work in parallel and communicate asynchronously, which is well-suited to the development of computer-based, multi-agent systems for operations. This A-team based approach, although it is still in the beginning stage, also has potential for handling other difficult power system problems.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.66-76
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• 2009

The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

• Journal of Korean Society of Environmental Engineers
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• v.31 no.4
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• pp.249-255
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• 2009

The performance of microbial fuel cell (MFC) can be affected by many factors including the rate of organic matter oxidation, the electron transfer to electrode by electrochemical bacteria, proton diffusion, the concentration of electron acceptor, the rate of electron acceptor reduction and internal resistance. the performance of MFC using oxygen as electron acceptor can be influenced by oxygen concentration as limit factors in cathode compartment. Many studies have been performed to enhance electricity production from MFC. The series or parallel stacked MFC connected several MFC units can use to increase voltages and currents produced from MFCs. In this study, a single MFC (S-MFC) and a stacked MFC (ST-MFC) using acetate as electron donor and oxygen as electron acceptor were used to investigate the influence of dissolved oxygen (DO) concentrations in cathode compartment on MFC performance. The power density (W/$m^3$) of S-MFC was in order DO 5 > 3 > 7 > 9 mg/L, the maximum power density (W/$m^3$) of S-MFC was 42 W/$m^3$ at DO 5 mg/L. The power density (W/$m^3$) of ST-MFC was in order DO 5 > 7 > 9 > 3 mg/L and the maximum power density (W/$m^3$) of STMFC was 20 W/$m^3$ at DO 5 mg/L. These results suggest that the DO concentration of cathode chamber should be considered as important limit factor of MFC operation and design for stacked MFC as well as single MFC. The results of ST-MFC operation showed the voltage decrease of some MFC units by salt formation on the surface of anode, resulting in decrease total voltage of ST-MFC. Therefore, connecting MFC units in parallel might be more appropriate way than series connections to enhance power production of stacked MFC.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.48 no.6
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• pp.467-478
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• 2020

Hypervisor virtualize hardware resources to utilize them more effectively. At the same time, hypervisor's characteristics of time and space partitioning improves reliability of flight software by reducing a complexity of the flight software. Korea Aerospace Research Institute chooses one of hypervisors for space, XtratuM, and examine its applicability to the flight software. XtratuM has strong points in performance improvement with high reliability. However, it does not support SMP. Therefore, it has limitation in using it with high performance applications including satellite altitude orbit control systems. This paper proposes RTEMS XM-SMP to support SMP with RTEMS, one of real time operating systems for space. Several components are added as hypercalls, and initialization processes are modified to use several processors with inter processors communication routines. In addition, all components related to processors are updated including context switch and interrupts. The effectiveness of the developed RTEMS XM-SMP is demonstrated with a GR740 board by executing SMP benchmark functions. Performance improvements are reviewed to check the effectiveness of SMP operations.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.2
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• pp.138-148
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• 2001

Digital Video (DV) coding standards for digital video cassette recorder are based mainly on DCT and variable length coding. DV has low hardware complexity but high compressed bit rate of about 26 Mb/s. Thus, it is necessary to encode video with low complex video coding at the studios and then transcode compressed video into MPEG-2 for video-on-demand system. Because these coding methods exploit DCT, transcoding in the DCT domain can reduce computational complexity by excluding duplicated procedures. In transcoding DV into MPEC-2 intra coding, multiplying matrix by transformed data is used for 4:1:1-to-4:2:2 chroma format conversion and the conversion from 2-4-8 to 8-8 DCT mode, and therefore enables parallel processing. Variance of sub block for MPEG-2 rate control is computed completely in the DCT domain. These are verified through experiments. We estimate motion hierarchically using DCT coefficients for transcoding into MPEG-2 inter coding. First, we estimate motion of a macro block (MB) only with 4 DC values of 4 sub blocks and then estimate motion with 16-point MB using IDCT of 2$\times$2 low frequencies in each sub block, and finish estimation at a sub pixel as the fifth step. ME with overlapped search range shows better PSNR performance than ME without overlapping.