• Title/Summary/Keyword: 병렬시스템

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A Study of Effective Power Management for Infrafree Variable Message Sign (인프라 독립형 가변안내표지판의 효율적 전력 운영 방안 연구)

  • Lim, Se-Mi;Lee, Ji-Hoon;Park, Jun-Seok;Kim, Byung-Jong;Kim, Won-Kyu;Son, Seung-Neo
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.10 no.6
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    • pp.53-62
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    • 2011
  • Although the demand of Variable Message Sign(VMS) has become pervasive in fulfilling the ITS policy, there are still several unsolved problematic issues. The most critical ones of them are inequality and inefficiency of providing traffic information. This paper proposes the Infra-free Variable Message Sign in order to provide useful informations such as road condition, weather, and traffic of the area, where constructing the infrastructure of communication and power supply is relatively very hard. First of all, the characteristics of infra-free Variable Message Sign are studied and analyzed in deep because of differences between normal Variable Message Sign and Infra-free Variable Message Sign in the configuration and the operating method due to the nature of the Infra-free Variable Message Sign. Futhermore, for effective power management of operating Infra-free Variable Message Sign with limited power acquired through stand-alone PV system, new battery connection structure and dynamically variable power managements for the differently shown messages on Variable Message Sign are proposed. The proposed structure in this paper can be applied to not only power management for Infra-free Variable Message Sign but also power management for the various applications using parallel connection battery system.

90/150 RCA Corresponding to Maximum Weight Polynomial with degree 2n (2n 차 최대무게 다항식에 대응하는 90/150 RCA)

  • Choi, Un-Sook;Cho, Sung-Jin
    • The Journal of the Korea institute of electronic communication sciences
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    • v.13 no.4
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    • pp.819-826
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    • 2018
  • The generalized Hamming weight is one of the important parameters of the linear code. It determines the performance of the code when the linear codes are applied to a cryptographic system. In addition, when the block code is decoded by soft decision using the lattice diagram, it becomes a measure for evaluating the state complexity required for the implementation. In particular, a bit-parallel multiplier on finite fields based on trinomials have been studied. Cellular automata(CA) has superior randomness over LFSR due to its ability to update its state simultaneously by local interaction. In this paper, we deal with the efficient synthesis of the pseudo random number generator, which is one of the important factors in the design of effective cryptosystem. We analyze the property of the characteristic polynomial of the simple 90/150 transition rule block, and propose a synthesis algorithm of the reversible 90/150 CA corresponding to the trinomials $x^2^n+x^{2^n-1}+1$($n{\geq}2$) and the 90/150 reversible CA(RCA) corresponding to the maximum weight polynomial with $2^n$ degree by using this rule block.

A Study on the Implementation of the Multi-Process Structured ISDN Terminal Adaptor for Sending the Ultra Sound Medical Images (다중처리 구조를 갖는 초음파 의료영상 전송용 ISDN(Integrated Services Digital Network) TA(Terminal Adaptor) 구현에 관한 연구)

  • 남상규;이영후
    • Journal of Biomedical Engineering Research
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    • v.15 no.3
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    • pp.317-324
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    • 1994
  • This paper proposed a new method in the implementation of ISDN (integrated services digital network) LAPD (link access procedure on the D-channel) and LAPB (link access procedure on the B-channel) protocols. The proposed method in this paper implement ISDW LAPD protocol through multi-tasking operating system and adopt a kernel part that is changed operating system to target board. The features of implemented system are (1) the para.llel processing of the events generated at each layer, as follows (2) the supporting necessary timers for the implementation of ISDW LAPD protocol from the kernel part by using software, (3) the recommanded SAP (Service Access Point) from CCITT was composed by using port function in the operating system. With the proposed method, the protocols of ISDH layerl, layer2 and layer3 (call control) were implemented by using the kernel part and related tests were carried out by connecting the ISDH terminal simulator to ISDN S-interface system using the ISDN LAPD protocol The results showed that ISDW S-interface terminals could be discriminated by TEI (Terminal Equipment Identifier) assignment in layer 2 (LAPD) and the message transmission of layer 3 was verified by establishing the multi-frame transmission and then through the path established by the LAPD protocol, a user data was tranfered and received on B-channel with LAPB protocol Thererfore, as new efficient ISDN S-interface environment was implemented in the thesis, it was verified that the implemented system can be utilized by connecting ISDW in the future to transfer a medical image data.

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The Motion Estimator Implementation with Efficient Structure for Full Search Algorithm of Variable Block Size (다양한 블록 크기의 전역 탐색 알고리즘을 위한 효율적인 구조를 갖는 움직임 추정기 설계)

  • Hwang, Jong-Hee;Choe, Yoon-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.66-76
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    • 2009
  • The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

An Omnidirectional High Gain Antenna for UHF Band Ground Station (UHF대역 지상국용 무지향 고이득 안테나)

  • Bae, Ki-Hyoung;Chang, Min-Soo;Joo, Jae-Woo;Hwang, Chan-Ho;Hong, Ki-Pyo
    • Journal of the Korea Knowledge Information Technology Society
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    • v.12 no.4
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    • pp.539-550
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    • 2017
  • In this paper, we designed, fabricated and tested an UHF band cylindrical dipole array antenna. In the proposed antenna, cylindrical dipoles were vertically arranged in four stages. A parallel structure feeding circuit was installed inside the cylindrical dipole and mounted so as to be broadband matching. The feeding circuit was installed at the center of the cylindrical dipole to optimize the gain flatness characteristic of the azimuth direction omnidirectional radiation pattern. Minimizing the difference between the signals branched from the feeding circuit and realizing the symmetry of the radiation pattern. The required specifications are more than 11.2% bandwidth in UHF band, above 6dBi antenna gain, standing wave ratio of 2:1 or less, less than ${\pm}1dB$ gain flatness in azimuth radiation pattern, more than 13 degrees in elevation radiation pattern of 3dB beamwidth. We confirmed the possibility of implementation through M&S and verified the result of M&S through production and testing. The test results are 11.2% bandwidth in the UHF band, 6.30 to 8.31 dBi gain, 1.53:1 standing wave ratio or less, within ${\pm}0.2dB$ gain flatness in the azimuth radiation pattern, elevation radiation pattern of 3dB beam width was 15.62 to 15.84 degrees. The test result meets all requirements specifications.

Comparison of Korean Real-time Text-to-Speech Technology Based on Deep Learning (딥러닝 기반 한국어 실시간 TTS 기술 비교)

  • Kwon, Chul Hong
    • The Journal of the Convergence on Culture Technology
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    • v.7 no.1
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    • pp.640-645
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    • 2021
  • The deep learning based end-to-end TTS system consists of Text2Mel module that generates spectrogram from text, and vocoder module that synthesizes speech signals from spectrogram. Recently, by applying deep learning technology to the TTS system the intelligibility and naturalness of the synthesized speech is as improved as human vocalization. However, it has the disadvantage that the inference speed for synthesizing speech is very slow compared to the conventional method. The inference speed can be improved by applying the non-autoregressive method which can generate speech samples in parallel independent of previously generated samples. In this paper, we introduce FastSpeech, FastSpeech 2, and FastPitch as Text2Mel technology, and Parallel WaveGAN, Multi-band MelGAN, and WaveGlow as vocoder technology applying non-autoregressive method. And we implement them to verify whether it can be processed in real time. Experimental results show that by the obtained RTF all the presented methods are sufficiently capable of real-time processing. And it can be seen that the size of the learned model is about tens to hundreds of megabytes except WaveGlow, and it can be applied to the embedded environment where the memory is limited.

Probabilistic Risk Assessment of a Cable-Stayed Bridge Based on the Prediction Method for the Combination of Failure Modes (붕괴모드 조합 예측법에 의한 PSC사장교의 위험도평가)

  • Park, Mi-Yun;Cho, Hyo-Nam;Cho, Taejun
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.26 no.4A
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    • pp.647-657
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    • 2006
  • Probabilistic Risk Assessment considering statistically random variables is performed for the preliminary design of a Cable Stayed Bridge, which is Prestressed Concrete Bridge consisted of cable and plate girders, based on the method of Working Stress Design and Strength Design. Component reliabilities of cables and girders have been evaluated using the response surface of the design variables at the selected critical sections based on the maximum shear, positive and negative moment locations. Response Surface Method (RSM) is successfully applied for reliability analyses for this relatively small probability of failure of the complex structure, which is hard to obtain through Monte-Carlo Simulations. or through First Order Second Moment Method that can not easily calculate the derivative terms of implicit limit state functions. For the analysis of system reliability, parallel resistance system consisting of cables and plate girder is changed into series connection system and the result of system reliability of total structure is presented. As a system reliability, the upper and lower probabilities of failure for the structural system have been evaluated and compared with the suggested prediction method for the combination of failure modes. The suggested prediction method for the combination of failure modes reveals the unexpected combinations of element failures in significantly reduced time and efforts compared with the previous permutation method or system reliability analysis method, which calculates upper and lower bound failure probabilities.

CINEMAPIC : Generative AI-based movie concept photo booth system (시네마픽 : 생성형 AI기반 영화 컨셉 포토부스 시스템)

  • Seokhyun Jeong;Seungkyu Leem;Jungjin Lee
    • Journal of the Korea Computer Graphics Society
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    • v.30 no.3
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    • pp.149-158
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    • 2024
  • Photo booths have traditionally provided a fun and easy way to capture and print photos to cherish memories. These booths allow individuals to capture their desired poses and props, sharing memories with friends and family. To enable diverse expressions, generative AI-powered photo booths have emerged. However, existing AI photo booths face challenges such as difficulty in taking group photos, inability to accurately reflect user's poses, and the challenge of applying different concepts to individual subjects. To tackle these issues, we present CINEMAPIC, a photo booth system that allows users to freely choose poses, positions, and concepts for their photos. The system workflow includes three main steps: pre-processing, generation, and post-processing to apply individualized concepts. To produce high-quality group photos, the system generates a transparent image for each character and enhances the backdrop-composited image through a small number of denoising steps. The workflow is accelerated by applying an optimized diffusion model and GPU parallelization. The system was implemented as a prototype, and its effectiveness was validated through a user study and a large-scale pilot operation involving approximately 400 users. The results showed a significant preference for the proposed system over existing methods, confirming its potential for real-world photo booth applications. The proposed CINEMAPIC photo booth is expected to lead the way in a more creative and differentiated market, with potential for widespread application in various fields.

Study of system using load cell for real time weight sensing of artificial incubator (인공부화기의 실시간 중량감지를 위한 로드셀을 이용한 시스템 연구)

  • jeong, Jin-hyoung;Kim, Ae-kyung;Lee, Sang-Sik
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.2
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    • pp.144-149
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    • 2018
  • The eggs are incubated for 18 days through the generator and incubated in the developing incubator. During the developmental period, the weight loss of the fetus is correlated with the ventricular formation, and the proper ventricular formation is also associated with the healthy embryonic hatching and the egg hatching rate. However, in the incubator period of the domestic hatchery, it is a reality to acquire the resultant side by the Iranian standard weight measurement with the experience of the hatchery and the person concerned and the development period without the apparatus for measuring the present weight. As a result, prevalence of early mortality, hunger and illness during hatching are frequent. Monitoring the reduction of weaning weight is crucial to obtaining chick quality and hatching performance with weight changes within the development machine. Water loss is different depending on the size of eggs, egg shell, and elder group. We can expect to increase the hatching rate by measuring the weight change in real time and optimizing the ventilation change accordingly. There is a need to develop a real-time measurement system that can control 10 to 13% reduction of the total weight during hatching. The system through this study is a way to check the one - time directly when moving the existing egg, and it is impossible to control the measurement of the fetal water evaporation within the development period. Unlike systems that do not affect the hatching rate, four load cells are connected in parallel on the Arduino sketch board and the AT-command command is used to connect the mobile phone and computer in real time. The communication speed of Bluetooth was set to 15200 to match the communication speed of Arduino and Hyper-terminal program. The real - time monitoring system was designed to visually check the change of the weight of the fetus in the artificial incubator. In this way, we aimed to improve the hatching rate and health condition of the hatching eggs.

A Hardware Implementation of the Underlying Field Arithmetic Processor based on Optimized Unit Operation Components for Elliptic Curve Cryptosystems (타원곡선을 암호시스템에 사용되는 최적단위 연산항을 기반으로 한 기저체 연산기의 하드웨어 구현)

  • Jo, Seong-Je;Kwon, Yong-Jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.1
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    • pp.88-95
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    • 2002
  • In recent years, the security of hardware and software systems is one of the most essential factor of our safe network community. As elliptic Curve Cryptosystems proposed by N. Koblitz and V. Miller independently in 1985, require fewer bits for the same security as the existing cryptosystems, for example RSA, there is a net reduction in cost size, and time. In this thesis, we propose an efficient hardware architecture of underlying field arithmetic processor for Elliptic Curve Cryptosystems, and a very useful method for implementing the architecture, especially multiplicative inverse operator over GF$GF (2^m)$ onto FPGA and futhermore VLSI, where the method is based on optimized unit operation components. We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed and inversion speed has been improved 150 times, 480 times respectively compared with the thesis presented by Sarwono Sutikno et al. [7]. The designed underlying arithmetic processor can be also applied for implementing other crypto-processor and various finite field applications.