• ETRI Journal
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• v.11 no.4
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• pp.105-118
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• 1989

HARP(High performance Architecture for RISC type Processor)는 고유의 명령어 세트, 데이터 타입, 메모리 입출력, 예외 처리 기능을갖는 32비트 VLSI 프로세서 구조이다. 마이크로 아키텍츄어는 설계된 구조를 기대할 수 있는최고 성능을 갖도록 구조(architecture)와 구현(implementation) 사이의 최적 모델링을 통해 정의되는 구조체로서 구조의 개념 설계를 구현의 실물 설계로 변환 시켜주는 조율(tuning)모델이다. HARP의 고유한 명령어 세트를 비롯한 구조적 기능들을 최적 구현 하기위해 32비트 크기의 명령어 입력 유니트(Instruction Fetch Unit), 데이터 입출력 유니트(Data I/O Unit), 명령어/데이터 처리유니트(Instruction/Data Processing Unit), 예외 상황 처리 유니트(Exception Processing Unit)등 4개 유니트가 설계되었으며 이들 4개 유니트의 동작을 최대 속도로 유지시키기 위해 각급 주요 설계 변수들이 시뮬레이션을 통해 최적화 되었다. 유효 채널길이 $0.7\mum$급 3층 메탈 배선의 HCMOS(High performance CMOS)공정 기술을 구현 기준 기술로 사용하여 50MHz외 동작 주파수에서 최대50 MIPS(Million Instructions Per Second)의 성능을 갖도록 3단계 파이프라인이 설계되었다. 단일 위상의 50MHz클럭 입력과 동기화된 명령어/데이터 입출력을 위해 액세스 타임 20nsec이내의 고속 메모리 입출력 구조가 시뮬레이션되었으며 설계된 마이크로 아키텍츄어를 이용하여 HARP구조의 기대된 최대 성능을 검증하였다.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.195-198
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• 2002

현재의 광통신, 이동통신 및 디지털 시대에서는 보다 소형화되고, 대용량의 데이터 저장 및 다기능 소자에 대한 요구가 많아지고 있다. 이러한 전자 산업 환경에서 MEMS 소자는 여러 요구조건을 만족시킬 수 있는 특징을 갖추고 있으며 실제 소자의 제작에 있어서 MEMS 소자를 이용하여 여러 물리 및 화학 센서 및 Actuator 제작에 응용이 되어지고 있고 Optical switch, Gyroscope, 적외선 어레이 센서, 가속도 센서, 위치 센서 등 여러 분야에서 실용화가 진행되어지고 있다. MEMS 구조물의 packaging 방법에 있어서는 내부 MEMS 소자의 동작을 위한 외부 환경으로부터의 보호를 위하여 Hermetic sealing에 대한 요구를 만족시켜야 한다. 본 발표에서는 이와 같은 MEMS device의 진공 패키지를 구현함에 있어서 기판 내부에 수동소자를 실장할 수 있는 LTCC 기술을 이용하여 진공 패키징하는 방법에 대하여 소개한다. 본 기술을 이용하는 경우 기존의 Hermetic sealing 이외에 향후 적층 기판 내부에 수동소자를 내장시켜 배선 길이 및 노이즈 성분을 감소시켜 더욱 전기적 성능을 향상시킬 수 있는 장점이 있게된다. 본 논문에서는 LTCC 기판을 이용하여 패키징 시킨 후, 내부 진공도에 영향을 줄 수 있는 계면들에서의 시간에 따른 진공도 변화의 특성치를 측정하여 LTCC 기판의 Hermetic sealing 특성에 관하여 조사하였다.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.96-106
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• 2014

Previous academic research on FPGA tools has relied on simple imaginary models for the targeting architecture. As the first step to overcome such restriction, the issues on analytic placement and legalization which are applied to commercial FPGAs have been brought up, and several techniques to remedy them are presented, and evaluated. First of all, the center of gravity of the placed cells may be far displaced from the center of the chip during analytic placement. A function is proposed to be added to the objective function for minimizing this displacement. And then, the density map is expanded into multiple layers to accurately calculate the density distribution for each of the cell types. Early fixation is also proposed for the memory blocks which can be placed at limited sites in small numbers. Since two flip-flops share control pins in a slice, a compatibility constraint is introduced during legalization. Pre-packing compatible flip-flops is proposed as a proactive step. The proposed techniques are implemented on the K-FPGA fabric evaluation framework in which commercial architectures can be precisely modeled, and modified for enhancement, and validated on twelve industrial strength examples. The placement results show that the proposed techniques have reduced the wire length by 22%, and the slice usage by 5% on average. This research is expected to be a development basis of the optimization CAD tools for new as well as the state-of-the-art FPGA architectures.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.13-22
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• 2001

This paper presents three dimensional structure of RF packages and the improvement effect of its electrical characteristics when implementing RF transceivers. We divided RF modules into several subunits following each subunit function based on the partitioning algorithm which suggests a method of three dimension stacking interconnection, PAA(pad area array) interconnection and stacking of three dimensional RF package structures. 224MHz ITS(Intelligent Transportation System) RF module subdivided into subunits of functional blocks of a receiver(RX), a transmitter(TX), a phase locked loop(PLL) and power(PWR) unit, simultaneously meeting the requirements of impedance characteristic and system stability. Each sub­functional unit has its own frequency region of 224MHz, 21.4MHz, and 450KHz~DC. The signal gain of receiver and transmitter unit showed 18.9㏈, 23.9㏈. PLL and PWR modules also provided stable phase locking, constant voltages which agree with design specifications and maximize their characteristics. The RF module of three dimension stacking structure showed $48cm^3$, 76.9％ reduction in volume and 4.8cm, 28.4％ in net length, 41.8$^{\circ}C$, 37% in maximum operating temperature, respectively. We have found that three dimensional PAA package structure is able to produce high speed, high density, low power characteristics and to improve its functional characteristics by subdividing RF modules according to the subunit function and the operating frequency, and the features of physical volume, electrical characteristics, and thermal conditions compared to two dimensional RF circuit modules.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.11
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• pp.23-32
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• 2005

The automatic generation of circuit diagrams has been practically used in the HDL based design for decades. Nevertheless, the diagrams became too complicated for the designers to identify the signal flows in the RTL and system level designs. In this paper, we propose four techniques to enhance the roadability of the complicated diagrams. They include i) the transformation of repetitive instances and terminals into vector forms, ii) an improved loop breaking algorithm, iii) a flat tap which simplifies the two level bus ripping structure that is required for the connection of a bundle net to multiple buses, and iv) the identification of block strings, and alignment of the corresponding blocks. Towards validating the proposed techniques, the diagrams of an industrial strength design m generated. The complexity of the diagrams has been reduced by up to $90\%$ in terms of the number of wires, the aggregate wire length, and the area.

• Journal of the Korean Society of Safety
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• v.27 no.4
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• pp.38-42
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• 2012

This paper describes electrical fire on residential environment such as apartment and detached house caused by defect of interior wiring. We carried out experimental study on short circuit characteristics by the interior wiring length. We were measured arc current, arc energy and interrupting time of earth leakage current circuit breaker(ELB), when an interior wiring break out short circuit in residential environment. From the experiment results, the longer of the interior wiring, the magnitude of arc current decreased and the interrupting time of ELB increased. When applied the A maker's ELB, the strength of arc current and interrupting time of ELB was 254 A and 245 ms respectively at 30 m interior wiring length. In 3 m interior wiring length, arc current and interrupting time was 716 A and 4.24 ms respectively. Arc energy was dependent on the magnitude of arc current and the interrupting time of ELB, the longer the interrupting time, arc energy increasing. In this paper, minimum arc energy was 277 J using C maker's ELB and 3 m interior wiring length(arc current 283 A, interrupting time of breaker 6.28 ms). Therefore in the residential environment, short circuit caused by defect of the interior wiring lead to electrical fire.

• Journal of the Microelectronics and Packaging Society
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• v.31 no.2
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• pp.16-22
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• 2024

With advances of artificial intelligence (AI) technology, the demand is increasing for high-end semiconductors in various places such as data centers. In order to improve the performance of semiconductors, reducing the pitch of patterns and increasing density of I/Os are required. For this issue, 2.5dimension(D) packaging is gaining attention as a promising solution. The core technologies used in 2.5D packaging include microbump, interposer, and bridge die. These technologies enable the implementation of a larger number of I/Os than conventional methods, enabling a large amount of information to be transmitted and received simultaneously. This paper proposes the Molded Bridge die on Substrate (MBoS) process technology, which combines molding and Redistribution Layer (RDL) processes. The proposed MBoS technology is expected to contribute to the popularization of next-generation packaging technology due to its easy adaption and wide application areas.

• The Journal of Korean Society for Radiation Therapy
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• v.26 no.2
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• pp.297-303
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• 2014

Purpose : The purpose of this study is reproducibility evaluation of deep inspiration breath-hold(DIBH) technique by respiration data and heart position analysis in radiation therapy for Left Breast cancer patients. Materials and Methods : Free breathing(FB) Computed Tomography(CT) images and DIBH CT images of three left breast cancer patients were used to evaluate the heart volume and dose during treatment planing system( Eclipse version 10.0, Varian, USA ). The signal of RPM (Real-time Position Management) Respiratory Gating System (version 1.7.5, Varian, USA) was used to evaluate respiration stability of DIBH during breast radiation therapy. The images for measurement of heart position were acquired by the Electronic portal imaging device(EPID) cine acquisition mode. The distance of heart at the three measuring points(A, B, C) on each image was measured by Offline Review (ARIA 10, Varian, USA). Results : Significant differences were found between the FB and DIBH plans for mean heart dose (6.82 vs. 1.91 Gy), heart $V_{30}$ (68.57 vs. $8.26cm^3$), $V_{20}$ (76.43 vs. $11.34cm^3$). The standard deviation of DIBH signal of each patient was ${\pm}0.07cm$, ${\pm}0.04cm$, ${\pm}0.13cm$, respectively. The Maximum and Minimum heart distance on EPID images were measured as 0.32 cm and 0.00 cm. Conclusion : Consequently, using the DIBH technique with radiation therapy for left breast cancer patients is very useful to establish the treatment plan and to reduce the heart dose. In addition, it is beneficial to using the Cine acquisition mode of EPID for the reproducibility evaluation of DIBH.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.1
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• pp.31-38
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• 2003

In the current electronic technology atmosphere, MEMS (Microelectromechanical System) technology is regarded as one of promising device manufacturing technologies to realize market-demanding device properties. In the packaging of MEMS devices, the packaged structure must maintain hermeticity to protect the devices from a hostile atmosphere during their operations. For such MEMS device vacuum packaging, we introduce the LTCC (Low temperature Cofired Ceramic) packaging technology, in which embedded passive components such as resistors, capacitors and inductors can be realized inside the package. The technology has also the advantages of the shortened length of inner and surface traces, reduced signal delay time due to the multilayer structure and cost reduction by more simplified packaging processes owing to the realization of embedded passives which in turn enhances the electrical performance and increases the reliability of the packages. In this paper, the leakage rate of the LTCC package having several interfaces was measured and the possibility of LTCC technology application to MEMS devices vacuum packaging was investigated and it was verified that improved hermetic sealing can be achieved for various model structures having different types of interfaces (leak rate: stacked via; $4.1{\pm}1.11{\times}10^{-12}$/ Torrl/sec, LTCC/AgPd/solder/Cu-tube; $3.4{\pm}0.33{\times}10^{-12}$/ Torrl/sec). In real application of the LTCC technology, the technology can be successfully applied to the vacuum packaging of the Infrared Sensor Array and the images of light-up lamp through the sensor way in LTCC package structure was presented.

• 한국해양학회지
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• v.26 no.1
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• pp.24-37
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• 1991

Marine benthic diatoms and environmental factors were studied at 60 sites on the Mangyung-Dongjin tidal flat of the west coast of Korea. Sediment samples were taken quantitatively from the upper 5 mm layer to obtain a representative estimate of the epipelic and epipsammic cell concentration. Surface sediments taken simultaneously with the quantitative diatom samples were analysed for the grain size. Exposure duration of study sites were calculated by the tide data recorded at Kunsan Outer-Harbour. Coarse sediments dominated mainly on the offshore coastal and lower tidal flat, whereas fine sediments occurred on inner and higher tidal flat. Total 371 diatom taxa were collected and the genera represented by a great number were Navicula and Nizschia. The 16 abundant species occupying more than 1% of total cell number are of the following: Paralia sulcata, Navicula sp. 1, Navicula arenaria, Cymatosira belgica, Amplora holsatica, Amphora coffeaeformis, Achnanthes hauckiana, Rhaphoneis amphiceros, Thalassionema nitzschioides. Navicula sp. 2, Dimeregramma minor, Amphora sp. 1, Cyclotella atomus, C, striata, Nitzschia kuetzingiana, Stephanodiscus sp. 1. The distribution pattern of these dominant species are described in relation to the habitat condition. Most of these species showed high densities in fine sediments. However, they occurred even silty sand and sandy sediments in low abundance. The epipsammic forms belonging to the Araphidineae and Monoraphidineae were restricted on the lower tidal flat. The typical species found in coarse sediments were: Cocconeis sp. 1, Opephora martyi, Amphora sabyii, Dimeregramma minor var. nana, Fragilaria virescens var. oblongella, F. virescens, Cocconeis grata. The higher tidal flat consisting of fine sediments showed relatively higher cell numbers than the lower tidal flat. River mouth region was the highest in abundance.