• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.964-969
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• 2007

A regulated low phase noise differential colpitts VCO(Voltage Controlled Oscillator) for mobile RFID system is presented. The differential colpitts VCO meets the dense reader environment specifications. The VCO use a $0.35{\mu}m$ technology and achieves tuning range $1.55{sim}2.053 GHz$. Measuring 910 MHz frequency divider output, phase noise performance is -106 dBcMz and -135dBc/Hz at 40 kHz and 1MHz offset, respectively. 5-bit digital coarse-tuning and accumulation type MOS varactors allow for 28.2% tuning range, which is required to cover the LO frequency range of a UHF Mobile RFID system, Optimum design techniques ensure low VCO gain(<45 MHz/V) for good interoperability with the frequency synthesizer. To the author' knowledge, this differential colpitts VCO achieves a figure of merit(FOM) of 1.93dB at 2-GHz band.

• Journal of Advanced Navigation Technology
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• v.8 no.1
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• pp.57-65
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• 2004

In this paper, keeping pace with light weight, pocket-size, lower-price, we design VCO(Voltage Controlled Oscillator) X/Ku band for using at public RD(Radar Detector) to apply to controlled voltage on base in transistor which used as a oscillator, without using varactor diode in part of VCO tuner. As a result of simulation, we conclude VCO could be have 110 MHz by controlled voltage 4.25 V to 4.80 V and show its output 9.63 dBm at operating frequency, 11.46 GHz, and its phase noise -107.2 dBc at 1 MHz offset frequency. So it turned out suitable performance for commercial use.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1399-1400
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• 2008

본 논문에서는 TSMC 0.18um 공정을 이용하여 2.45GHz 대역에서 동작하는 RFID 리더에 적용 할 수 있는 전압제어 발진기를 설계하였다. 위상 잡음 특성 향상을 위해 PMOS, NMOS 소자를 대칭으로 구성한 complementary cross-coupled LC 발진기 구조로 설계 하였고 MOS 배렉터를 이용하여 주파수를 가변 하였다. 또한 공정에서 사용되는 인덕터에 차폐 도체면(PGS:Patterned Ground Shield) 구조를 삽입했을 때 인덕터의 품질계수가 약 5.82% 향상되었고. 이에 따른 위상 잡음은 1MHz offset 주파수에서 PGS를 삽입하지 않는 구조에서는 -102.666dBc/Hz 이며, PGS 구조를 삽입한 구조는 -104.328dBc/Hz로 약1.662dBc 정도의 성능이 향상 되었다. 전압제어 발진기 Core 사이즈는 900um ${\times}$ 590um이고 주파수 가변 범위는 배렉터 전압 1.2${\sim}$2.1V에서 249MHz로 11.4% 특성을 보였다. 1.8V공급전압에서 5.76mW의 전력소모를 보였다.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 1998.03a
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• pp.297-303
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• 1998

본 논문에서는 게이트 길이 0.25um, 게이트 폭 150um(6 $\times$25)um 인 HEMT를 이용하여 11.7GHz~12.2GHz 대역 위성방송용 수신기의 기본회로를 설계하였다. 수신기는 저잡음증폭기, 믹서, 국부발진기, 중간주파수증폭기로 구성되어 있으며 LO 주파수는 10.75GHz 이고 IF 주파수는 0.95 ~1.45GHz 이다. 수신기의 설계목표는 전체이득 32dB 이상, 잡음지수 2.6dB 이하, 입출력 단의 반사손실은 각각 -10dB, -10dB 이하이며 저잡음증폭기, 믹서 및 중간주파수증폭기의 최소이득 및 최대잡음지수 14dB, 1dB, 믹서는 각각 0dB, 10dB, 중간주파수증폭기는 각각 18dB, 5dB 가 되게 설계하였다. 저잡음증폭기와 중간주파수증폭기는 2단으로 , 믹서는 이중 게이트구조로, 국부발진기는 반사형의 구조로 설계하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.10
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• pp.3866-3872
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• 2010

This paper presents a design of high power oscillator using a spiral resonator and high power transistor with measurement. Even lots of drawbacks are known in design of oscillators using high power transistors, the spiral resonator is adopted because it has relatively high Q out of planar resonators. The designed power oscillator at 1.8GHz is fabricated and tested. Measurement shows the obtained output power is 23.5dBm at 1.74GHz with -146.76dBc/Hz of phase noise at 1MHz offset. In addition, it is illustrated that the frequency stability is excellent with the shift less than 1MHz and the measured maximum output power is around 24dBm when the bias voltages are adjusted.

• Journal of IKEEE
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• v.25 no.4
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• pp.721-727
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• 2021

This paper proposes a UWB (Ultar-wideband) impulse generator using the gated ring oscillator. The oscillator and PLL circuits which generate a several GHz LO signal for the conventional architecture are replaced with the gated ring oscillator. Therefore, the system complexity is decreased. The proposed architecture controls the duty of enable signal, which is used for the head switch of ring oscillator. The control of the duty enables to tun off the oscillator during the guard interval and stop wasting the power consumption. The pulse shaping method using the counter makes the small side lobe and preserves the bandwidth regardless of the change on the center frequency. Designed UWB impulse generator could change the center frequency from 6.0 GHz to 8.8 GHz with a digital bit control, while it preserves the bandwidth as about 1.5 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.1 s.343
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• pp.149-155
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• 2006

A technique used to induce maximum oscillating voltage in the BJT Clapp VCO is presented. The technique finds the optimal feedback capacitance values resulting in the largest oscillating signal swing across the resonator at a given bias state and the VCO's center frequency. By doing so, the presented technique attains the lowest phase noise which the BJT Clapp VCO can have. An analysis of the measurement results of the fabricated oscillators has verified that the VCO with the optimal feedback capacitance values actually exhibits the lowest phase noise.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.3
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• pp.34-41
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• 2011

This paper presents a wide tuning range, fine-resolution DCO (Digitally Controlled Oscillator) with an active inductor. In order to control the frequency of the DCO, the transconductance of the active inductor is tuned digitally. In addition, the DCO gain needs to be calibrated digitally to compensate for gain variations. To cover the wide tuning range, an automatic three-step coarse tuning scheme is proposed. The DCO total frequency tuning range is 1.4 GHz (2.1 GHz to 3.5 GHz), it is 58 % at 2.4 GHz. An effective frequency resolution is 0.14 kHz/LSB. The proposed DCO is implemented in 0.13 ${\mu}m$ CMOS process. The total power consumption is 6.6 mW from a 1.2 V supply voltage. The phase noise of the DCO output at 2.4 GHz is -120.67 dBc/Hz at 1 MHz offset.

• Journal of Navigation and Port Research
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• v.30 no.10 s.116
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• pp.847-853
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• 2006

In this paper, we designed VCO(voltage controlled oscillator} that is composed of a dielectric resonator and a varactor diode, and the PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The results at 12.05 GHz show the output power is 13.54 dBm frequency tuning range approximately +/- 7.5 MHz, and power variation over the tuning range less than 0.2 dB, respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 dBc/Hz at 100 kHz offset from carrier, and The second harmonic suppression is less than -41.49 dBc. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.1
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• pp.69-75
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• 2010

In this paper, with using the clapp type VCO(Voltage Controlled Osillator) configuration a wideband frequency synthesizer in UHF band is proposed. In order to design a wideband frequency synthesizer, the variation of phase in the negative resistance circuit as well as the load circuit was analyzed. Based on this result we propose a method to widen the operation range of the VCO. A frequency synthesizer using the proposed wideband VCO was designed and fabricated. It is shown that the synthesizer has the operating frequency range of 740~1,530 MHz by 0~5 V varactor tuning voltage, and it had the output power of 2~-6 dBm. Moreover, the phase noise measured as -77 dBc/Hz at 10 kHz offset, and as -108 dBc/Hz at 100 kHz offset from the oscillation frequency.