• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.5B
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• pp.677-684
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• 2001

본 논문에서는 계단근사법이 아닌 다중 box분할기법을 이용하여 증가형 MOSFET의 강반전조건하에서의 I-V 모델링을 제안한다. 즉, 이온주입된 MOSFET의 강반전층의 깊이를 다중box분할기법에 의하여 구하고, 이 깊이에서의 이동전하농도 및 수직전계의존 LMS이동도 모델에 의한 이동도를 구하였다. 그리도 이들 파라메터들을 바탕으로 드레인전압에 대한 드레인 전류식을 유도하였다. 제안 드레인전류식의 타당성을 검증하기 위하여 게이트 전압을 변화시켜 가면서, 제안된 I-V 모델링에 대해 모의 실험을 수행하고 Charge-sheet 모델에 의해서 구한 드레인 전류치와 비교하였다. 모의실험수행결과 유사한 I-V 특성을 나타냄을 확인하였다.

• Proceedings of the Korean Magnestics Society Conference
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• 2002.12a
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• pp.180-181
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• 2002

수직기록매체에서 기록 밀도가 증가하기 위해서는 bit의 크기를 줄여야 하고, 이를 위해서는 writing head의 width와 thickness를 줄여야 한다. 그러나 head의 크기가 줄어들면 기록층의 자화를 반전시키기에 충분한 write field를 얻지 못한다. 이를 극복하기 위해 head의 tip부분을 trimming을 하여 작은 pole tip 크기를 가지면서도 큰 write field를 얻고, 여분의 magnetic field를 얻기 위해 soft underlayer를 도입하는 이중층 수직기록 매체가 제안되고 있다. (중략)

• Journal of Korea Entertainment Industry Association
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• v.14 no.1
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• pp.107-116
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• 2020

The Hong Kong film "Project Gutenberg" has obtained the great achievements at the box office and public reputation due to such multiple factors as realistic counterfeit banknote production process, breathtaking gunfight scenes, brain-burning plot, unexpected reversal ending, personal charm of Chow Yun-Fat and so on. In terms of film narrative, the director utilized the narrator, Li Wen, to guide the police and audience in the limited angle of perspective into the scheme, and make the symbolic meaning image of the actor Chow Yun-Fat stengthen the audience's confirmation for the imagination of "painter", with the introduction of multiple narratives and flashback of different characters and scenes, and then finally, used the narrative structure with multiple lines and layers to uncover the truth. There are three great reversals in the film, each of which is overthrow for the film plot, and every overthrow is a disavowal of the audience's cognition for the previous story; therefore it brings the greatly emotional tension, making the audience get complete release and relief in the process of the psychological game of cognition, identification and decision-making at the end.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.9-18
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• 2005

To make high-performance, low-power transistors beyond the technology node of 60 nm complementary metal-oxide-semiconductor field-effect transistors(C-MOSFETs) possible, the effect of electron mobility of the thickness of strained Si grown on a relaxed SiGe/SiO2/Si was investigated from the viewpoint of mobility enhancement via two approaches. First the parameters for the inter-valley phonon scattering model were optimized. Second, theoretical calculation of the electronic states of the two-fold and four-fold valleys in the strained Si inversion layer were performed, including such characteristics as the energy band diagrams, electron populations, electron concentrations, phonon scattering rate, and phonon-limited electron mobility. The electron mobility in an silicon germanium on insulator(SGOI) n-MOSFET was observed to be about 1.5 to 1.7 times higher than that of a conventional silicon on insulator(SOI) n-MOSFET over the whole range of Si thickness in the SOI structure. This trend was good consistent with our experimental results. In Particular, it was observed that when the strained Si thickness was decreased below 10 nm, the phonon-limited electron mobility in an SGOI n-MOSFT with a Si channel thickness of less than 6 nm differed significantly from that of the conventional SOI n-MOSFET. It can be attributed this difference that some electrons in the strained SGOI n-MOSFET inversion layer tunnelled into the SiGe layer, whereas carrier confinement occurred in the conventional SOI n-MOSFET. In addition, we confirmed that in the Si thickness range of from 10 nm to 3 nm the Phonon-limited electron mobility in an SGOI n-MOSFET was governed by the inter-valley Phonon scattering rate. This result indicates that a fully depleted C-MOSFET with a channel length of less than 15 m should be fabricated on an strained Si SGOI structure in order to obtain a higher drain current.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.24-24
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• 2011

ZnO 직접 천이형의 와이드밴드갭 화합물 반도체로써 높은 엑시톤 결합 에너지를 가짐으로 해서 광전자나 광학디바이스로의 넓은 응용범위를 갖고 있다. 최근들어 ZnO의 비선형 광학 특성이 보고 됨으로써 새로운 광학 재료로서의 연구도 기대되고 있다. 본연구에서는 새로운 주기적 반전 구조를 제안함으로 해서 극성을 가지는 화합물 반도체의 비선형 광학 디바이스로의 응용 범위를 넓히고자 한다. ZnO는 Wurtzite 구조를 가짐으로 해서 성장 방향으로 Zn-극성 및 O-극성을 가지게 된다. 이런 자연 발생적인 극성에 의해 물리적, 화학적, 광학적 특성들이 바뀌게 됨으로, 극성의 제어는 재료의 특성을 극대화 시키기 위해 아주 중요한 항목이 되어 있습니다. 본 연구에서는 손쉽고 재현성이 확보되는 방법으로써, CrN 와 Cr2O 3의 완충층을 제안하여 ZnO 극성의 제어를 이루었고, 제안된 극성 제어 방식을 이용하여 주기적으로 Zn-극성과 O-극성이 배열된 구조(PPI 구조)를 형성 하였다. 패터닝과 재성장 방법을 통해서 다양한 구조와 사이즈의 1D, 2D PPI ZnO를 제작하는데 성공하였다. 주기적인 반전구조의 제작을 확인하기 위해 PRM(piezo response miscosocpy)이라는 방법을 통하여 주기적 극성 선택성을 확인하였으며, TEM과 PL 분석법을 통하여 구조적 광학적 특성을 분석하였다. 새롭게 제안된 극성 제어 방식을 이용하여 제작된 PPI 구조를 이용하여 비선형 광학소자로의 응용성을 확인하였다. 본발표에서는 PPI ZnO 구조의 형성방법, 분석 및 응용에 대한 제안과 결과가 논의될 것이다.

• Journal of the Korean Magnetics Society
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• v.6 no.1
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• pp.15-20
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• 1996

Co/Pd와 Co/Pd 다층박막으로 구성된 이중막 시스템에서 direct overwriting을 구현하는데 필수적인 교환결합 (exchange coupling)에 대하여 연구하였다. Co/Pd 및 Co/Pd 다층박막을 수직자성을 가지도록 하기 위하여 Co층의 두께를 4- .angs. 이하로 하여 전자빔 증착법으로 제작한 후 x-ray 회절 실험으로 구조 분석을 하였고, Kerr spectrometer, VSM을 사용하여 자기 및 자기광학적 성질을 조사하였다. 기억막과 기준막으로 구성된 이중막에서는 exchange coupling이 커서 자화반전이 두 박막에서 동시에 일어나며, 두 박막사이에 적당한 두께의 비자성 사이막(non-magnetic spacer)이 존재하는 경우에는 두 박막사이의 교환결합의 크기가 줄어들어서 두 박막의 자화반전이 분리되어 계단식 자화곡선이 생겼다. 또 비자성 사이막이 두꺼우면 두 박막사이의 교환결합이 사라짐이 관찰 되었다. 두 박막사이의 교환결합은 자구 기록 실험을 통해서도 그 존재를 확인할 수 있었다.

• Electrical & Electronic Materials
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• v.9 no.2
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• pp.174-179
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• 1996

We present a new physically based analytical equation for electron effective mobility in MOS inversion layers. The new semi-empirical model is accounting expicitly for surface roughness scattering and screened Coulomb scattering in addition to phonon scattering. This model shows excellent agreement with experimentally measured effective mobility data from three different published sources for a wide range of effective transverse field, channel doping and temperature. By accounting for screened Coulomb scattering due to doping impurities in the channel, our model describes very well the roll-off of effective mobility in the low field (threshold) region for a wide range of channel doping level (Na=3.0*10$^{14}$ - 2.8*10$^{18}$ cm$^{-3}$ ).

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.9
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• pp.397-407
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• 2002

A new simulator which predicts the quantum effect in NMOSFET structure is developed. Using the self-consistent method by numerical method, this simulator accurately predicts the carrier distribution due to improved calculation precision of potential in the inversion layer. However, previous simulator uses analytical potential distribution or analytic function based fitting parameter Using the developed simulator, threshold voltage increment and gate capacitance reduction due to the quantum effect are analyzed in NMOS. Especially, as oxide thickness and channel doping dependence of quantum effect is analyzed, and the property analysis for the next generation device is carried out.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.367-368
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• 2007

To investigate the 2nO thin films which are interested in the next generation of short wavelength LEDs and Lasers and UV photodetector with p-type inversion layer, the ZnO thin films were deposited by RF sputtering system. Gas ratios and work pressure is Ar : $O_2$ = 4 : 1 and 15 mTorr, respectively, and the purity of ZnO target is 5N. The ZnO thin films were deposited at 300, 450, and $650^{\circ}C$. The current-voltage, responsivity and quantum efficiency of devices were studied and compared with each devices.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.11
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• pp.49-54
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• 1990

In this paper, a simple model is presented for the gate-voltage dependence of the parasitic resistance in MOSFETs with the lightly-doped drain (LDD) structure. At the LDD region located under the gate electrode, an accumulation layer is formed due to the gate voltage. The parasitic resistance of the source side LDD in the channel is treated as a parallel combination of the resistance of the accumulation layer and that of the bulk LDD, which is approximated as a spreading resistance from the end of the channel inversion layer to the ${n^+}$/LDD junction boundary. Also the effects of doping gradients at the junction are discussed. As result of the model, the LDD resistance decreases with increasing the gate voltage at the linear regime, and increase quasi-linearly with the gate voltage at the saturation regime, considering th velocity saturation both in the channel and in the LDD region. The results are in good agreement with experimental data reported by others.