• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.6
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• pp.1441-1446
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• 2010

This paper presents a method of constructing the divider using sequential logic systems over finite fields(or galois fields). The proposed the sequential logic systems is constructed by as following. First of all, we obtain the linear characteristics between present state and next state based on mathematical properties of finite fields and sequential logic systems. Next, we realize the sequential logic systems over finite fields using above linear characteristics and characteristic polynomial which is expressed using by matrix. Also, we apply to implement divider using the proposed sequential logic systems over finite fields.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.888-889
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• 2015

This paper presents a method of constructing the system-on-chip(SoC) based on embedded systems. The proposed method is more compact and effectiveness than former methods. The requirements generation start high level performance simulation and then passes to an executable specification suitable for implementation using a hardware/software co-design tool. The reuse of pre-exiting components is supported, as well as synthesis of the system interface, but only after much work is done to program the hardware/software co-design tool. The actual design flow described allows feedback among all design levels, e.g. from implementation up to requirements, throughout the process. In the future, it is necessary to development the advanced method of constructing system-on-chip based on embedded systems.

• The Journal of Korean Institute for Practical Engineering Education
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• v.3 no.1
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• pp.69-75
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• 2011

This paper presents a model of e-learning based on ubiquitous computing configuration. First of all, we survey the advanced e-learning systems for foreign and domestic universities. Next we propose the optimal e-learning model based on ubiquitous computing configuration. The proposed e-learning model as following. we propose the e-learning system's hardware and software configurations, that are server and networking systems. Also, we construct the proposed e-learning systems's services. There are attendance and absence service, class management service, common knowledge service, score processing service, facilities management service, personal management service, personal authorization issue management service, campus guide service, lecture-hall management service. Then we propose the laboratory equipment management service, experimental materials management service etc. The proposed model of e-learning based on ubiquitous computing configuration will be able to contribute to the next generation university educational paradigm.

• The Journal of Korean Institute for Practical Engineering Education
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• v.4 no.1
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• pp.51-56
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• 2012

This paper present a teaching method of 21C University Education Paradigm after survey the earlier several effective teaching methods. We discuss the efficient pre-teaching, also we propose several teaching methods for really teaching. And we discuss the efficient ending of teaching. They are as following. : lesson configuration, good usage for first time of teaching, pleasant face-to-face talk, teaching techniques check list, question method, caution item when the teaching ending, etc. Also, we propose the method of ending techniques for teaching ending time. The proposed teaching method is the most efficiency in case of using selective the above mentioned several efficient teaching method.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.117-123
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• 2014

This paper proposes the constructing method of effective multiplier using basis transformation. Th proposed multiplier is composed of the standard-dual basis transformation circuit module to change one input into dual basis the operation module to generate from bm to bm+k by the m degree irreducible polynomial, and the polynomial multiplicative module to consist of $m^2$ AND and m(m-1) EX-OR gates. Also, the dual-standard basis transformation circuit module to change the output part to be shown as a dual basis into standard basis is composed. The operation modules to need in each operational part are defined.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.88-93
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• 2016

This paper presents a method of constructing the highly performance switching circuit(HPSC) over finite fields. The proposed method is as following. First of all, we extract the input/output relationship of linear characteristics for the given digital switching functions, Next, we convert the input/output relationship to Directed Cyclic Graph using basic gates adder and coefficient multiplier that are defined by mathematical properties in finite fields. Also, we propose the new factorization method for matrix characteristics equation that represent the relationship of the input/output characteristics. The proposed method have properties of generalization and regularity. Also, the proposed method is possible to any prime number multiplication expression.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.6
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• pp.910-920
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• 1990

This paper presents a method of constructing an Arithmetic Operation Unit Systems (A.O.U.S.) over Galois Field GF(2**m) for the purpose of the four arithmetical operation(addition, subtraction, multiplication and division between two elements in GF(2**mm). The proposed A.O.U.S. is constructed by following procedure. First of all, we obtained each four arithmetical operation algorithms for performing the four arithmetical operations using by mathematical properties over GF(2**m). Next, for the purpose of realizing the four arithmetical unit module (adder module, subtracter module, multiplier module and divider module), we constructed basic cells using the four arithmetical operation algorithms. Then, we realized the four Arithmetical Operation Unit Modules(A.O.U.M.) using basic cells and we constructd distributor modules for the purpose of merging A.O.U.M. with distributor modules. Finally, we constructed the A.O.U.S. over GF(2**m) by synthesizing A.O.U.M. with distributor modules. We prospect that we are able to construct an Arithmetic & Logical Operation Unit Systems (A.L.O.U.S.) if we will merge the proposed A.O.U.S. in this paper with Logical Operation Unit Systems (L.O.U.S.).

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.78-91
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• 1998

This paper presents modular design techniques of multiple-valued logic functions about the function decomposition method and input variable management method. The function decomposition method takes avantage of the property of the column multiplicity in a single-column variable partitioning. Due to the increased number of identical modules, we can achieve a simpler circuit design by using a single T-gate, which can eliminate some of the control functions in the module libraty types. The input variable management method is to reduce the complexity of the input variables by proposing the look up table which assign input variables to a code. In this case as the number of sub-functions increase the code-length and the size of the code-assignment table grow. We identify some situations where shard input variables among sub-functions can be further reduced by a simplicication technique. According to the result of adapting this method to a function, we have demonstrated the superiority of the proposed methods which is bing decreased to about 12% of interconnection and about 16% of T-gate numbers compare with th eexisting for th enon-symmetric and irregular function realization.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1288-1293
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• 2005

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The CMIEDDs represents extension valued multiple-output functions, while TDBM systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

• The Journal of Korean Institute for Practical Engineering Education
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• v.4 no.2
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• pp.60-66
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• 2012

This paper present a learning method of 21C university education paradigm after survey the earlier several effective learning methods after we survey the earlier several researches which is researched until latest. For the purpose of that, we discuss the goal of learning, and effective time management and learning preparation. In general, many students spent valueless time without self-driving learning method during their student's period. But when they are higher grade, they know the important of self-driving learning method. The proposed learning method is the more efficiency in case of using selective of mentioned several efficient learning method according to student's quality and given lecture class configuration.