• Title/Summary/Keyword: 모드5

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Flow Control of Smart UAV Airfoil Using Synthetic Jet Part 2 : Flow control in Transition Mode Using Synthetic Jet (Synthetic jet을 이용한 스마트 무인기(SUAV) 유동제어 Part 2 : 천이 비행 모드에서 synthetic jet을 이용한 유동제어)

  • Kim, Min-Hee;Kim, Sang-Hoon;Kim, Woo-Re;Kim, Chong-Am;Kim, Yu-Shin
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.37 no.12
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    • pp.1184-1191
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    • 2009
  • In order to reduce the download around the Smart UAV(SUAV) at Transition mode, flow control using synthetic jet has been performed. Many of the complex tilt rotor flow features are captured including the leading and trailing edge separation, and the large region of separated flow beneath the wing. Based on the results of part 1 of the present work, synthetic jet is located at 0.01c, $0.95c_{flap}$ and it is operated with the non-dimensional frequency of 0.5, 5 to control the leading edge and trailing edge separation. Consequently, download is substantially reduced compared to with no control case at transition mode using leading edge jet only. The present results show that the overall flight performance and stability of the SUAV can be remarkably improved by applying the active flow control strategy based on synthetic jet.

Design of a High Performance Multiplier Using Current-Mode CMOS Quaternary Logic Circuits (전류모드 CMOS 4치 논리회로를 이용한 고성능 곱셈기 설계)

  • Kim, Jong-Soo;Kim, Jeong-Beom
    • Journal of IKEEE
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    • v.9 no.1 s.16
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    • pp.1-6
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    • 2005
  • This paper proposes a high performance multiplier using CMOS multiple-valued logic circuits. The multiplier based on the Modified Baugh-Wooley algorithm is designed with current-mode CMOS quaternary logic circuits. The multiplier is functionally partitioned into the following major sections: partial product generator block(binary-quaternary logic conversion block), current-mode quaternary logic full-adder block, and quaternary-binary logic conversion block. The proposed multiplier has 4.5ns of propagation delay and 6.1mW of power consumption. This multiplier can easily adapted to the binary system by the encoder and the decoder. This circuit is designed with 0.35um standard CMOS process at 3.3V supply voltage and 5uA unit current. The validity and effectiveness are verified through the HSPICE simulation.

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Ramjet Mode Combustion Test for a Dual-Mode Ramjet Engine Model with a Large Backward-Facing Step (큰 후향 계단이 있는 이중 모드 램젯 엔진 모델의 램젯 모드 연소 시험)

  • Yang, Inyoung;Lee, Kyung-jae;Lee, Yang-ji;Kim, Chun-taek
    • Journal of the Korean Society of Propulsion Engineers
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    • v.20 no.6
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    • pp.83-90
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    • 2016
  • Ramjet mode combustion test was performed for a dual-mode ramjet engine model. The engine model consists of an air intake, a combustor and a nozzle. The combustor in the model has a large backward-facing step, designed to be used as a part of a rocket-based combined cycle engine. The test was performed at the flight speed of Mach 5 and the altitude of 24 km. Strong combustion was established only when the fuel was injected from both of the bottom-side and cowl-side wall. When the total fuel stoichiometric ratio was 1.0, distributed as 0.5 on the cowl side and 0.5 on the bottom side, the flow became subsonic at some portion in the combustor by thermal choking, i.e., ramjet mode was established for this condition.

Low-power Single-Chip Current-to-Voltage Converter for Wireless OFDM Terminal Modem (OFDM 용 무선통신단말기 모뎀의 저소비 전력화를 위한 단일칩용 I-V 컨버터)

  • Kim, Seong-Kweon
    • Journal of the Korean Institute of Intelligent Systems
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    • v.17 no.4
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    • pp.569-574
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    • 2007
  • 최근 많은 광대역 유무선 통신 응용분야에서 OFDM(Orthogonal Frequency Division Multiplexing) 방식을 표준기술로 채택하고 있다. OFDM 방식의 고속 무선 데이터 통신을 위한 FFT 프로세서는 일반적으로 DSP(Digital Signal Processing)로 구현되었으나, 큰 전력 소비를 필요로 한다. 따라서, OFDM 통신방식의 단점인 전력문제를 보완하기 위해서 전류모드 FFT LSI가 제안되었고, 저소비전력 전류모드 FFT LSI를 동작시키기 위해서는 전류모드를 전압모드로 바꾸는 VIC(Voltage to Current Converter) 그리고 다시 전류모드를 전압모드로 바꾸어 주는 IVC(Current to Voltage Converter)가 필요하다. 그러나, OP-AMP로 구현되는 종래의 IVC는 회로규모가 크고, 전력소비가 크며, LSI 내에 크고 정확한 높은 저항을 필요로 한다. 또한 전류모드신호처리에서 많이 이용되는 Current Mirror 회로 등의 출력단자로부터 전류신호를 입력받은 경우, 입력단자간의 전위차가 발생하며, DC offset 전류가 발생하는 등의 문제점을 갖는다. 따라서 본 연구에서는 저전력 동작이 가능하고, 향후, single chip 응용이 가능한 IVC를 $0.35{\mu}m$ 공정에서 설계함으로서, $0.35{\mu}m$ 공정에서의 전류모드 FFT LSI의 전압모드 출력이 가능해졌다 설계된 IVC는 FFT LSI의 출력이 디지털신호로 환산한 ${\pm}1$인 점을 감안하여, 전류모드 FFT LSI의 출력이 $13.65{\mu}A$ 이상일 때에 3.0V의 전압을 출력하고, FFT LSI의 출력이 $0.15{\mu}A$ 이하일 때에 0.5V 이하의 전압을 출력하도록 하였으며, IVC의 총 소비전력은 약 1.65mV이하로 평가되었다.

CETAN : A Cost Estimation Tool for Access Networks (가입자망 구축 비용 산출 Tool 개발)

  • 이상윤;정수환;임채운;유건일;권순철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.5A
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    • pp.713-719
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    • 2001
  • 가입자망을 위한 구축비용 산출 도구인 CETAN은 FTTC(Fiber-To-The-Curve) 가입자망 계획시 효과적인 비용 산출을 위하여 개발되었다. CETAN은 수동모드와 자동모드의 두 가지 운용 모드를 가지고 있다. 수동모드는 사용자에 의하여 어떤 특정지역의 장비들 값을 설정한 후에 비용 산출 함수들을 이용하여 그것을 자동으로 계산해 주는 모드이고, 자동모드는 대략적인 비용 산출을 위하여 수많은 비용 요소들을 고려하는 대신에 몇 개의 중요한 비용 요소만을 이용하여 빠르게 비용 산출을 할 수 있게 해주는 모드이다. 개선된 GUI는 또한 서로 다른 구조들의 비용을 쉽게 비교할 수 있도록 해준다. FTTC 구조에서 CETAN을 이용해 산출한 몇 가지 비용 산출 결과들을 비교 토의하였다.

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A Study on the Mode Combination for Efficient Calculation of Scattering Matrix in Mode-Matching Techniques (모드정합법에서 효율적인 산란행렬 계산을 위한 모드 조합에 관한 연구)

  • 이용희;이정해;이창화
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.5
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    • pp.777-785
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    • 1999
  • For an efficient calculation of scattering matrix in mode matching techniques, mode combination has been studied in this paper. A conducting post in rectangular waveguide, which is most commonly utilized in the combline filter structure, is adopted and its scattering matrix is derived. We eliminates the TE and TM modes having little influence on result, which results in the different number of TE and TM modes in each discontinuous region.

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Nano-scale Power Splitters by using Plasmonic Multimode Interference Couplers (플라즈마 다중모드 간섭 결합기를 사용한 나노 크기의 전력분배기)

  • Ho, Kwang-Chun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.11 no.4
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    • pp.47-52
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    • 2011
  • Nano-scale power splitter based on Si plasmonic waveguides are designed by utilizing the multimode interference (MMI) coupler. Effective dielectric method and longitudinal modal transmission-line theory are used for simulating the light propagation and optimizing the structural parameters at 3-D guiding geometry. The designed $1{\times}2$ 50:50 MMI power splitter has a nano-scale size of only $800nm{\times}850nm$. In order to achieve a variable power splitting ratio, a $2{\times}2$ MMI coupler is designed and the corresponding power splitting ratio can be tuned in the range of 78.5%:15.5%~5.5%:86.6%. Also, it is shown that it has a large bandwidth of $1.5{\mu}m{\sim}1.7{\mu}m$. In this range, the transmission is over 0.8.

A New Switchable Dual Mode Voltage Controlled Oscillator (새로운 구조의 스위치형 이중 모드 전압 제어 발진기)

  • Ryu, Jee-Youl;Deboma, Gilbert D.
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.869-872
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    • 2005
  • This paper presents a new switchable dual mode VCO(Voltage-Controlled Oscillator). The VCO is efficient in dual mode operation and has self-bias adjustment based on the operation frequencies of 2.4 GHz and 5 GHz. The switching is done using MOS transistors and tuning is done using MOS varactors. It is implemented using TSMC 0.18${\mu}$m CMOS technology. It is powered by 1.8V supply. The measured results showed that the overall tuning range is approximately 13% at 5 GHz and 8% at 2.4 GHz. The measured phase noise is approximately -102 dBc/Hz at 1 MHz offset for 5 GHz and -89 dBc/Hz at 600kHz offset for 2.4 GHz. The VCO showed tail currents of 2mA in 5GHz mode and 2.5mA in 2.4GHz mode from a 1.8 V supply, respectively.

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A new continuous-time current-mode integrator for realization of low-voltage current-mode CMOS filter (저전압 전류모드 CMOS 필터 구현을 위한 새로운 연속시간 전류모드 적분기)

  • 방준호;조성익;김동용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.4
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    • pp.1068-1076
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    • 1996
  • In this paper, a new continuous-time current-mode integrator as basic building block of the low-voltage analyog current-mode active filters is proposed. Compared to the current-mode integrator which is proposed by Zele, the proposed current-mode integrator had higher unity gain frequency and output impedance in addition to lower power dissipation. And also, a current-mode third-order lowpass active filter is designed with the proposed current-mode integrator. The designed circuits are fabricated using the ORBIT's $1.2{\mu}{\textrm{m}}$ deouble-poly double-metal CMOS n-well process. The experimental results show that the filter has -3dB cutoff frequency at 44.5MHz and 3mW power dissipation with single 3.3V power supply and also $0.12mm^{2}$ chip area.

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Preliminary Analysis on Characteristics of Attitude Control based on Operation Scenario of Small SAR Satellite Mission, S-STEP (초소형 SAR 위성 S-STEP의 임무 시나리오에 따른 자세 제어 성능 예비 분석)

  • Lee, Eunji;Park, Jinhan;Song, Sung-Chan;Oh, Hyun-Ung
    • Journal of Aerospace System Engineering
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    • v.16 no.5
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    • pp.49-56
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    • 2022
  • S-STEP is a small SAR satellite mission that monitors time-limited emergency targets and military anomalies in areas of interest, achieving the average revisit in less than 30 minutes by deploying a constellation of 32 satellites in low orbit at an altitude of 510 km. The mission operation mode of S-STEP is divided into normal mode, observation mode, communication mode, and orbit maintenance mode. Further,, the attitude control mode is subdivides into initial detumbling, sun pointing, target pointing, ground station pointing, and thrust direction maintenance. Based on the preliminary mission operational scenario and the satellite's characteristics, this study analyzed the attitude control performance during initial detumbling and observation modes. It verifies that each mode's attitude control accuracy requirements within the time allotted by the scenario of the S-STEP achieved.