• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.4
• /
• pp.19-22
• /
• 2017

In this study, wavelength-free $1{\times}N$ optical splitter using a tapered polymer waveguide was studied to realize the transmission network of high-speed information communication network. Based on the evaluation of mode converting characteristics of splitter having two tapered multi-mode interference structures, an optimized structure of the $1{\times}N$ splitter was proposed for wide-range of input wavelength. 2D-BPM analysis $1{\times}8$ model showed that insertion loss of the proposed splitter is less than 10 dB for wavelength of input source from 1260 nm to 1650 nm.

• Journal of Broadcast Engineering
• /
• v.22 no.6
• /
• pp.850-853
• /
• 2017

In this paper, we propose an image analysis system based on omnidirectional image and object tracking image display using super wide angle camera. In order to generate spherical images, the projection process of converting from two wide-angle images to the equirectangular panoramic image was performed and the spherical image was expressed by converting rectangular to spherical coordinate system. Object tracking was performed by selecting the desired object initially, and KCF(Kernelized Correlation Filter) algorithm was used so that robust object tracking can be performed even when the object's shape is changed. In the initial dialog, the file and mode are selected, and then the result is displayed in the new dialog. If the object tracking mode is selected, the ROI is set by dragging the desired area in the new window.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.38 no.9
• /
• pp.933-941
• /
• 2014

This paper provides a comparison between the Krylov subspace method (KSM) and modal truncation method (MTM), which are typical projection-based model order reduction methods. The frequency responses are compared to determine the numerical accuracies and efficiencies. In order to compare the numerical accuracies of the KSM and MTM, the frequency responses and relative errors according to the order of the reduced model and frequency of interest are studied. Subsequently, a numerical examination shows whether a reduced order can be determined automatically with the help of an error convergence indicator. As for the numerical efficiency, the computation time needed to generate the projection matrix and the solution time to perform a frequency response analysis are compared according to the reduced order. A finite element model for a car suspension is considered as an application example of the numerical comparison.

• KIPS Transactions on Software and Data Engineering
• /
• v.5 no.12
• /
• pp.641-652
• /
• 2016

This paper proposes a method to generate test scripts in an automatic manner, based on checklist used for testing embedded systems in the fields. The proposed method can reduce the mistakes which may be introduced during manual generation. In addition, it can generate test scripts to test various mode combinations, which is not possible to be tested by the typical checklist. The test commands in a checklist are transformed into a test script suit referencing the signal values defined in a test command dictionary. In addition, the method to generate test scripts in sequential, double permutation and random manners is proposed useful to test the inter-operations between modes, a series of operations for a specific behavior. The proposed method is implemented and the feasibility is shown through the experiments.

• The Journal of the Acoustical Society of Korea
• /
• v.18 no.2
• /
• pp.53-60
• /
• 1999

In this paper, it is proposed to a new architecture of CMOS IADC(Current-Mode Analog-to-Digital Converter) using 1.5-bit bit cell of which consists a CSH(Current-Mode Sample-and-Hold) and CCMP(Current-Mode Comparator). In order to guarantee the entire linearity of IADC, the CSH is designed to cancel CFT(Clock Feedthrough) whose resolution is to meet at the least 9-bit which is placed in the front-end of each bit cell. In the proposed IADC, digital correction logic is simplified and power consumption is reduced because bit cell of each stage needs two latch CCMP. Also, it is available for a mixed-mode integrated circuit because all of block is designed with only MOS transistor. With the HYUNDAI 0.8㎛ CMOS parameter, the HSPICE simulation results show that the proposed IADC can be operated at 20Ms/s with SNR of 43 dB with which is satisfied 7-bit resolution for input signal at 100 ㎑, and its power consumption is 27㎽.

• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.8 no.6
• /
• pp.64-72
• /
• 2009

In this paper, a high efficiency 2.45 GHz rectenna with a microstrip patch antenna and a dual-mode band-pass filter in which the 2nd and 3rd harmonics are suppressed, is presented. From the experimental results, the 2.45GHz rectenna using 3rd harmonic suppressed dual-mode BPF shows the conversion efficiency of 41.6% with incident power density of 0.3 mW/cm2 and the received power of 1.66 mW. This result shows high conversion efficiency because the received power of this rectenna is lower than other rectennas to be compared with. This rectenna can be applied to the WPT (Wireless Power Transmission) field for energy harvesting. Also, it is expected to be used to provide the stand-by power for the low power devices for USN, and wireless power transfer in sensor application of MEMS devices.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.3
• /
• pp.397-409
• /
• 1993

This paper proposed the design methodology of the 8 bit binary parallel adder with carry book-ahead scheme via current-mode CMOS multivalued logic and simulated the proposed adder under $5{\mu}m$ standard IC process technology. The threshold conditions of $G_K$ and $P_K$ which are needed for m-valued parallel adder with CLA are evaluated and adopted for quaternary logic. The design of quaternary CMOS logic circuits, encoder, decoder, mod-4 adder, $G_K$ and $P_K$ detecting circuit and current-voltage converter is proposed and is simulated to prove the operations. These circuits are necessary for binary arithmetic using multivalued logic. By comparing with the conventional binary adder and the CCD-MVL adder, We show that the proposed adder cab be designed one look-ahead carry generator with 1-level structure under standard CMOS technology and confirm the usefulness of the proposed adder.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.27 no.7
• /
• pp.620-624
• /
• 2016

In this paper we designed a current mode logic frequency divider to transmit a baseband amplitude modulated signal. From simulation result, we studied input and output waveforms according to the variation of input bias voltage. For the purpose of the verification of the study, we designed a current mode logic frequency divider at 1,400 MHz. The designed frequency divider operates between 100 MHz and 3,000 MHz, for -33 dBm input power. The circuit draws $I_{total}=30mA$ from $V_{DD}=3V$ supply, and the simulation result shows that an amplitude modulated signal at 1,400 MHz with the modulation index of 0.5 was successfully downconverted to 700 MHz.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.39 no.2
• /
• pp.143-156
• /
• 2015

The stress and displacement fields at the crack tip were studied during the unsteady propagation of a mode III crack in a direction that was different from the property graduation direction in functionally graded materials (FGMs). The property graduation in FGMs was assumed based on the linearly varying shear modulus under a constant density and the exponentially varying shear modulus and density. To obtain the solution of the harmonic function, the general partial differential equation of the dynamic equilibrium equation was transformed into a Laplace equation. Based on the Laplace equation, the stress and displacement fields, which depended on the time rates of change in the crack tip speed and stress intensity factor, were obtained through an asymptotic analysis. Using the stress and displacement fields, the effects of the angled property variation on the stresses, displacements, and stress intensity factors are discussed.

• Korean Journal of Optics and Photonics
• /
• v.15 no.6
• /
• pp.547-554
• /
• 2004

We investigated a LiNbO$_3$ based integrated-optic polarization controller with the Ti-indiffused waveguide along the z-axis utilizing the electro-optic effect. The device consists of a first quarter-wave (λ / 4) followed by a half-wave (λ / 2) and a second quarter-wave (λ / 4) wave-plate. We analyzed the amount of phase change and the transformation of the polarized mode as a function of the combination of wave-plates and of their applied voltages. The operation has been systematically measured utilizing a polarimeter and Poincare sphere. We confirmed that the fabricated device controls the transformations from any arbitrary input state of polarization (SOP) into any general output SOP.