• Title/Summary/Keyword: 메모리 모델링

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A Phase Tuning Modeling for the Very Large Database (대용량 DB의 단계적 튜닝 모델링)

  • Lim, So-Jeong;Lee, Sang-Hoon
    • Proceedings of the Korea Information Processing Society Conference
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    • 2005.11a
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    • pp.79-82
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    • 2005
  • 데이터베이스 성능에 문제가 발생하게 되면 운영 시스템의 사양을 업그레이드하거나, 자원을 그대로 유지하면서 효율적으로 작업이 가능하도록 튜닝을 하게 된다. 시스템의 사양을 업그레이드하는 방법은 CPU, 메모리 등 OS 상의 제한된 자원을 비용을 들여 추가 또는 교체하게 되나 투자비용에 비해 성능 개선 효과는 제한적이다. 그에 반해 튜닝은 추가 비용 투자 없이 한정된 자원을 활용하여 성능개선 효과를 얻게 된다. 그러나 이러한 튜닝도 언제, 어떻게 적용해야 할지를 몰라서 비용과 성능 개선에 손해를 보는 경우가 있다. 따라서 본 연구에서는 이러한 문제점을 보완하여 시스템 구축 초기 단계인 요구분석 단계부터 마지막 단계인 시험 및 유지보수 단계까지 각 단계마다 IDEF0 모델링 방법을 적용한 튜닝 모델링을 제안한다.

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Development of Navigation-based Cursor Using Object Identifier on TACHYON (객체식별자를 사용한 항해기반의 데이터베이스 커서 개발)

  • Bae, Myung-Nam;Park, Yoo-Mi;Han, Mi-Kyong;Choi, Wan
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.04b
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    • pp.157-159
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    • 2001
  • 교환기 시스템(switching system)과 같은 통신 시스템 환경에서는 매우 제한적인 시간제약하에서 명시된 이벤트들이 반드시 완료되어야 한다. 따라서, 시스템내에 유지되는 응용데이터에 대해, 매우 빠르고 균일한 접근 시간을 제공하여야 한다. 또한, 최근들어 통신 운용 환경과 교환기 소프트웨어의 복잡성의 증가로 다중테이블 죠인과 객체지향 특성과 같은 고급 기능을 포함한 보다 향상된 데이터 모델링이 요구되고 있다. 이를 위해, 본 논문에서는 1) 통신 응용 환경을 보다 쉽게 모델링하도록 다양한 설계 모델링 개념을 제공하고, 2) 죠인과 같은 연산을 위해 추가의 메모리공간이나 시간을 사용하지 않고, 객체식별자의 항해를 통해 직접 결과를 추출하는 방법에 대해 설명한다.

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A High Speed FFT Processor for OFDM Systems (OFDM 시스템을 위한 고속 FFT 프로세서)

  • 조병각;손병수;선우명훈
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.12
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    • pp.513-519
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    • 2002
  • This paper proposes a high-speed FFT processor for orthogonal frequency-division multiplexing(OFDM) systems. The Proposed architecture uses a single-memory architecture and uses a radix-4 algorithm for high speed. The proposed memory is partitioned into four banks for high-speed computation. It uses an in-place memory strategy that stores butterfly outputs in the same memory location used by butterfly inputs. Therefore, the memory size can be reduced. The SQNR of about 80dB is achieved with 20-bit input and 20-bit twiddle factors. The architecture has been modeled by VHDL and logic synthesis has been performed using the SamsungTM 0.5㎛ SOG cell library (KG80). The implemented FFT processor consists of 98,326 gates excluding memory. It has smaller hardware than existing pipeline FFT processors for more than 1024-point FFTs. The processor can operate at 42MHz and calculate a 256-point complex FFT in 6us. It satisfies tile required processing speed of 8.4㎲ in the HomePlug standard.

Neural networks optimization for multi-dimensional digital signal processing in IoT devices (IoT 디바이스에서 다차원 디지털 신호 처리를 위한 신경망 최적화)

  • Choi, KwonTaeg
    • Journal of Digital Contents Society
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    • v.18 no.6
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    • pp.1165-1173
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    • 2017
  • Deep learning method, which is one of the most famous machine learning algorithms, has proven its applicability in various applications and is widely used in digital signal processing. However, it is difficult to apply deep learning technology to IoT devices with limited CPU performance and memory capacity, because a large number of training samples requires a lot of memory and computation time. In particular, if the Arduino with a very small memory capacity of 2K to 8K, is used, there are many limitations in implementing the algorithm. In this paper, we propose a method to optimize the ELM algorithm, which is proved to be accurate and efficient in various fields, on Arduino board. Experiments have shown that multi-class learning is possible up to 15-dimensional data on Arduino UNO with memory capacity of 2KB and possible up to 42-dimensional data on Arduino MEGA with memory capacity of 8KB. To evaluate the experiment, we proved the effectiveness of the proposed algorithm using the data sets generated using gaussian mixture modeling and the public UCI data sets.

Multi -Core Transactional Memory for High Contention Parallel Processing (집중 충돌 병렬 처리를 위한 효율적인 다중 코어 트랜잭셔널 메모리)

  • Kim, Seung-Hun;Kim, Sun-Woo;Ro, Won-Woo
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.48 no.1
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    • pp.72-79
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    • 2011
  • The importance of parallel programming seriously emerges ever since the modern microprocessor architecture has been shifted to the multi-core system. Transactional Memory has been proposed to address synchronization which is usually implemented by using locks. However, the lock based synchronization method reduces the parallelism and has the possibility of causing deadlock. In this paper, we propose an efficient method to utilize transactional memory for the situation which has high contention. The proposed idea is based on the theoretical analysis and it is verified with simulation results. The simulation environment has been implemented using HTM(Hardware Transactional Memory) systems. We also propose a model of the dining philosopher problem to discuss the efficient resource management using the transactional memory technique.

The Improvement of GaN Doherty Amplifier with Memory Effect Compensation (GaN Doherty 증폭기의 메모리 효과 보상을 통한 성능개선)

  • Lee, Suk-Hui;Cho, Gap-Je;Bang, Sung-Il
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.1
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    • pp.47-52
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    • 2012
  • A power amplifier is one of important factors for basestation's efficiency and the researches for efficency enhancement focus Doherty amplifier structure with GaN power devices in these days. A memory effect of Doherty amplifier affect operation characteristics for linearity and efficiency. This paper reports on electrothermal nonlinearity modeling and compensation for GaN Doherty amplifier's distortion. Also this paper reports on the dynamic expression of the instantaneous junction temperature as a function of the instantaneous dissipated power. We design distortion model for GaN Doherty amplifier and predistortion compensator for electrothermal memory effect from the proposed behavior model parameters. The simulations was evaluated by ADS Tools and GaN Doherty amplifier with 37dBm. The GaN Doherty amplifier with compensator enhanced about 16dB than without electrothemal memory effect compensator in 2-tone output spectrum.

A Study on the Design and the Performance Evaluation of System Bus for a MC 68000Based Multiprocessor System (멀티프로세서 시스템 구성을 위한 시스템 버스의 설계 및 성능평가에 관한 연구)

  • 이남재;김영천
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.2
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    • pp.88-97
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    • 1990
  • In this paper, DPA bus is proposed for implementation of MC 68000 based tightly-coupled multiprocessor system. The DPMC and arbiter are designed that the local memory of each PE can accept memory request both from a local processor and from the system bus. The performance of the proposed system bus is evaluated by Stochastic Petri Net(SPN) system modeling. The processing power, the efficiency, and the utilization of system bus are simulated for various load factors.

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Boundary conditions for Time-Domain Finite-Difference Elastic Wave Modeling in Anisotropic Media (이방성을 고려한 시간영역 유한차분법 탄성파 모델링에서의 경계조건)

  • Lee, Ho-Yong;Min, Dong-Joo;Kwoon, Byung-Doo;Lim, Seung-Chul;Yoo, Hai-Soo
    • Geophysics and Geophysical Exploration
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    • v.11 no.2
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    • pp.153-160
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    • 2008
  • Seismic modeling is used to simulate wave propagation in the earth. Although the earth's subsurface is usually semi-infinite, we cannot handle the semi-infinite model in seismic modeling because of limited computational resources. For this reason, we usually assume a finite-sized model in seismic modeling. In that case, we need to eliminate the edge reflections arising from the artificial boundaries introducing a proper boundary condition. In this study, we changed three kinds of boundary conditions (sponge boundary condition, Clayton and Engquist's absorbing boundary condition, and Higdon's transparent boundary condition) so that they can be applied in elastic wave modeling for anisotropic media. We then apply them to several models whose Poisson's ratios are different. Clayton and Engquist's absorbing boundary condition is unstable in both isotropic and anisotropic media, when Poisson's ratio is large. This indicates that the absorbing boundary condition can be applied in anisotropic media restrictively. Although the sponge boundary condition yields good results for both isotropic and anisotropic media, it requires too much computational memory and time. On the other hand, Higdon's transparent boundary condition is not only inexpensive, but also reduce reflections over a wide range of incident angles. We think that Higdon's transparent boundary condition can be a method of choice for anisotropic media, where Poisson's ratio is large.

Acceleration of computation speed for elastic wave simulation using a Graphic Processing Unit (그래픽 프로세서를 이용한 탄성파 수치모사의 계산속도 향상)

  • Nakata, Norimitsu;Tsuji, Takeshi;Matsuoka, Toshifumi
    • Geophysics and Geophysical Exploration
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    • v.14 no.1
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    • pp.98-104
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    • 2011
  • Numerical simulation in exploration geophysics provides important insights into subsurface wave propagation phenomena. Although elastic wave simulations take longer to compute than acoustic simulations, an elastic simulator can construct more realistic wavefields including shear components. Therefore, it is suitable for exploration of the responses of elastic bodies. To overcome the long duration of the calculations, we use a Graphic Processing Unit (GPU) to accelerate the elastic wave simulation. Because a GPU has many processors and a wide memory bandwidth, we can use it in a parallelised computing architecture. The GPU board used in this study is an NVIDIA Tesla C1060, which has 240 processors and a 102 GB/s memory bandwidth. Despite the availability of a parallel computing architecture (CUDA), developed by NVIDIA, we must optimise the usage of the different types of memory on the GPU device, and the sequence of calculations, to obtain a significant speedup of the computation. In this study, we simulate two- (2D) and threedimensional (3D) elastic wave propagation using the Finite-Difference Time-Domain (FDTD) method on GPUs. In the wave propagation simulation, we adopt the staggered-grid method, which is one of the conventional FD schemes, since this method can achieve sufficient accuracy for use in numerical modelling in geophysics. Our simulator optimises the usage of memory on the GPU device to reduce data access times, and uses faster memory as much as possible. This is a key factor in GPU computing. By using one GPU device and optimising its memory usage, we improved the computation time by more than 14 times in the 2D simulation, and over six times in the 3D simulation, compared with one CPU. Furthermore, by using three GPUs, we succeeded in accelerating the 3D simulation 10 times.

Non-causal Emotion based Brain Information Process model (비인과성 감정 기반 뇌 정보처리 모델)

  • 홍인택;연정흠;김용민;조현찬;전홍태
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2003.05a
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    • pp.189-192
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    • 2003
  • 본 논문에서는 인간 두뇌 정보처리 시스템 모델링의 일환으로 강정적 요소 기반의 제어를 제시하였다. 일반적인 제어 시스템과는 달리 인간 두뇌 시스템의 경우 감정적인 요인이 제어에 상당한 영향을 미친다는 의학적 보고에 따라 일차적인 환경요소에 의한 감정요인을 적용하여 모델을 구현하였다. 주어진 모듈 로봇은 랜덤으로 주어지는 환경에 대해 정보수집 단계를 거쳐 주행에 필요한 일차적인 운동 패턴을 습득하고 이를 메모리에 저장하여 분석하며 적응하는 이차적인 운동 패턴을 시행하게 된다 감정요인을 기반으로 한 판단 알고리즘에 의해 모듈 로봇은 환경에 적응하면서 주행하는 패턴을 보여주게 된다.

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