• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.2
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• pp.32-40
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• 2011

Reversible data hiding, which can recover the original image without any distortion after the extraction of the hidden data, has drawn considerable attention in recent years. However, underflow and overflow problems have occurred occasionally in the embedded image. To overcome these problems, we propose a new reversible data hiding algorithm which embeds a compressed location map used to identify these underflow and overflow points. In addition, the proposed algorithm allows for multilevel data hiding to increase the hiding capacity. The simulation results demonstrate that the proposed algorithm generates good performances in the PSNR, the embedding capacity, and the size of side information.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.5
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• pp.88-95
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• 2009

This paper is the research on the development of power conversion system for the fuel cell. In composing the DC/DC converters which have high boost voltage ratio, unlike the conventional method a new multi DC/DC converter system is proposed that the diode and the condenser and the reactor can be reduced by connecting the secondary side output of the transformer. In this system the rectifier part and the filter part of the secondary side in the power transformer that is connecting in series are composed into a single module, which is the strong advantage and the number of level can be easily increased. A new variable shift phase switching method is also suggested that it makes possible to reduce the output voltage ripples in the proposed system. All the factors mentioned above have been verified through simulations and experiments, and the proposed converter is considered very useful in the demanded load which requires a wide of the output.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.6
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• pp.341-349
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• 2014

Dynamic adaptive streaming over HTTP (DASH) is the most recent and promising technology to support high quality streaming services. In dynamic adaptive streaming over HTTP (DASH), a client consecutively estimates the available network bandwidth and decides the transmission rate for the forthcoming video chunks to be downloaded. In this paper, we propose a novel rate adaptation algorithm called quality of experience QoE-enhanced adaptation algorithm over DASH (QAAD), which preserves the minimum buffer length to avoid interruption and minimizes the video quality changes during the playback. We implemented a DASH test bed and conducted extensive experiments. Experimental results demonstrate that under fluctuating network conditions, QAAD provides seamless streaming with stabilized video quality while the previous buffer-aware algorithm (i.e., QDASH[9]) frequently changes the video quality and undergoes the interruption.

• Journal of KIISE
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• v.44 no.11
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• pp.1130-1137
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• 2017

The multi-leveling technique that stores multiple bits in a single memory cell has significantly improved the density of NAND flash memory along with shrinking processes. However, because of the side effects of the multi-leveling technique, the average write performance of MLC NAND flash memory is degraded more than twice that of SLC NAND flash memory. In this paper, we introduce existing cross-layer optimization techniques proposed to improve the performance of MLC NAND flash-based storages, and propose a new integration technique that overcomes the limitations of existing techniques by exploiting their complementarity. By fully exploiting the performance asymmetry in MLC NAND flash devices at the flash translation layer, the proposed technique can handle many write requests with the performance of SLC NAND flash devices, thus significantly improving the performance of NAND flash-based storages. Experimental results show that the proposed technique improves performance 39% on average over individual techniques.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.9
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• pp.658-665
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• 2006

In these days, the demand of users to extend available period of mobile systems is increased according as the functions of mobile systems have been varied and the use of multimedia application has been increased. This paper proposes an integrated power management framework that considers executed workload types for effective energy management. The conventional methods use DVFS technique for CPU and DPM technique for WNIC separately or simply combine them based on the assumption that they are orthogonal one another. However, the proposed mechanism determines the kind of workload under analysis of the characteristics of workloads incoming through a WNIC. The proposed method can reduce energy consumption of system level effectively by controlling CPU and WNIC to proper power mode based on analyzed characteristics of workload. The experimental result shows the proposed method reduces energy consumption by 9% for BE (Best Effort) workload, CBR (Constant Bit Rate) workload, and Interactive workload on average and by 16% to maximum when compared with the conventional methods which simply combine DVFS technique for CPU and DPM technique for WNIC.

• The Journal of the Korea Contents Association
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• v.6 no.12
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• pp.136-146
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• 2006

In Wireless Sensor Network(WSN) a sensor node transfers sensing data to the base-node through multi-hop because of the limited transmission range. Also because of the limited energy of the sensor node, the sensor nodes are required to consume their energy evenly to prolong the lifetime of the network. LMPR is a routing protocol for WSN, LMPR configures the network autonomously based on level which is the depth from the base-node, and distributes the transmission and computation load of the network to each sensor node. This paper implements LMPR on TinyOS and experiments on the performance of LMPR in WSN. As the result, the average of the received rate of LMPR is 91.39% and LMPR distributes the load of the transmission and computation about 4.6 times compare to the shortest cost routing protocol. We expect LMPR evenly distributes the transmission and computation load of the network to each node, and the lifetime of the network will be longer than it used to be.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.3
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• pp.244-249
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• 2010

The design of error correction code with low complexity has a good attraction for next generation multi-level cell flash memory. Sharing sub-expressions is effective method to reduce complexity and chip size. This paper proposes a new design method of m-bit parallel BCH encoder based on serial linear feedback shift register structure with low complexity using sub-expression. In addition, general algorithm for obtaining the sub-expression is introduced. The sub-expression can be expressed by matrix operation between sub-matrix of generator matrix and sum of two different variables. The number of the sub-expression is restricted by. The obtained sub-expressions can be shared for implementation of different m-parallel BCH encoder. This paper is not focused on solving a problem (delay) induced by numerous fan-out, but complexity reduction, expecially the number of gates.

• Journal of the Institute of Convergence Signal Processing
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• v.17 no.1
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• pp.46-52
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• 2016

LTE-Advanced system consisting of the number of cells in the cellular environment because it is built to allow efficient use of limited frequency resources of adjacent cell interference avoidance should be considered. Transition services in accordance with the development of the mobile communication technology, wireless multimedia content from voice-centric mobile communications services and causing a lot of mobile data traffic, such as smart phones and tablet terminals spread of a data-driven surge in mobile data traffic base stations in urban areas by increasing became a reality that can not be prevented. In this paper, we propose a new Hybrid resource allocation technique for improving the performance of the cell boundary and analyzed the performance of the proposed new techniques to perform the simulation using LTE-Advanced system level simulator based on 19cell of cellular system model.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.39 no.5
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• pp.477-485
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• 2002

In this paper, we present an efficient hardware architecture for the H.263 video codec and its VLSI implementation. This architecture is based on the unified interface by which internal hardware engines and an internal RISC processor are connected one another. The unified interface enables the modular design of internal blocks, efficient hardware/software partitioning, and pipelined paralled operations. The developed VLSI supports the H.263 version 2 profile 3 @ level 10, and moreover, both the control protocol H.245 and the multiplexing protocol H.223. Therefore, it can be used for the complete ITU-T H.324 or 3GPP 3G 324M multimedia processor with the help of an external audio codec. Simultaneous encoding and decoding of QCIF format images at a rate greater than 15 frames per second is achieved at 40 MHz clock frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.12C
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• pp.1014-1020
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• 2008

Storage devices such as memories are widely used in various electronic products. They require high-density memory and currently the data has been stored in multi-level format, that results in high error rate. In this paper, we apply error correction schemes that are widely used in communication system to the storage devices for satisfying low bit error rate and high code rate. In A WGN channel with average BER $10^{-5}$ and $5{\times}10^{-6}$, we study error correction schemes for 4-1evel cell to achieve target code rate 0.99 and target BER $10^{-11}$ and $10^{-13}$, respectively. Since block codes may perform better than the concatenated codes for high code rate, and it is important to use less degraded inner code even when many bits are punctured. The performance of concatenated codes using general feedforward systematic convolutional codes are worse than the block code only scheme. The simulation results show that RSC codes must be used as inner codes to achieve good performance of punctured convolutional codes for high code rate.