• The Inventors News
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• no.44
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• pp.1-16
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• 2006

한국여성발명협회,제7회 정기총회 개최/2006 대한민국 여성발명품 박람회/제12회 여성발명 우수사례 발표회/새롭게 바뀐 특허분류, 무엇이 달라졌나/해외 특허, 3월부터 무료로 검색 서비스/'디자인 등록증' 취업에 필수 요소 되다/전상우 특허청장 취임식 갖다/인라인 스케이트에도 특허 열풍/김종갑 전 특허청장, 산자부 제 1차관에 임명/공익변리사에게 무료 특허상담 받으세요/전상우 특허청장, 2006년 업무계획 발표/'제41회 발명의 날' 포상계획 공고/특허기술동향조사 확대/상표 불사용 취소심판 제도 개선/한국특허정보원, 한양대학교와 업무협약 체결/담배 상표, 다등록업체 1위KT&G/계절 관련 상표 출원, '봄'을 가장 선호/사회적 취약 계층, 심판.소송 비용 지원/국제문화대학원대학교,'국제 특허.경영학, 통해 전문가 과정 양성/'2006 대한민국 특허기술 이전박람회' 신청 접수/산업재산권분쟁조정 효력, '재판상 화해'로 강화/점차 늘고 있는 '유방암' 자가 진단법/'태국 발명가의 날 전시회' 한국발명진흥회 참가/'상표 판결문 요지집' 발간/역사 속의 발명품/하루 10분 발명교실/특허Q&A/'신뢰와 성실로 지식재산의 권리화를 돕겠습니다'/설봉초등학교 발명교실/아이디어 착상 및 발명 기법/사업화 지원 제도를 제대로 활용하려면/손님의 주문으로 만든 다니의 단팥죽/일본과 유럽, 브라질 디지털 방송 쟁탈전/미국, 도요타 흔들기 나섰다/새집증후군, 시스템 환기로 줄인다/공무원이 대나무로 분뇨 구린내 잡았다/획기적인 '기능성 목발' 탄생/발광 현수막, 눈에 띄네/리빙 아이디어/특허기술평가수수료 지원/한국여성발명협회 회원사 발명품 가이드

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.5
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• pp.1031-1038
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• 2005

In this paper, we propose real-time 3D image converting architecture by a unit of pixel for 2D/3D compatible PC and LCD of cellular phone with parallax burier, and implement a system for overall display operation after designing a circuit based on FPGA. After digitizing anolog image signal from PC, we recompose it to 3D image signal according to input image type. Since the architecture which rearranges 2D image to 3D depends on parallax burier, we use interleaving method which mixes pixels by a unit of R, G, and B cell. The propose architecture is designed into a circuit based on FPGA with high-speed memory access technique and use 4 SDRAMs for high performance data storing and processing. The implemented system consists of A/D converting system, FPGA system to formatting 2D signal to 3D, and LCD panel with parallax barrier, for 3D display.

• Journal of Digital Convergence
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• v.17 no.1
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• pp.169-177
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• 2019

The city is experiencing various problems such as traffic congestion, environmental pollution, urban crime, and faces the limit of growth. Recently, various attempts to build a Smart City have been spreading around the world, in order to solve these problems. Smart City is attracting attention as the core platform of the future city with the $4^{th}$ industrial revolution. However, various definitions of smart city are mixed, and the methods and strategies for implementing smart city are changing or evolving due to the development of technology and the experience during that time. This study summarizes the definition of various smart city through literature review and suggests smart city building strategy that enables sustainable growth of cities as a platform of the $4^{th}$ industrial revolution era.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.11
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• pp.2113-2120
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• 2015

This paper presents an integrated receiver to support multimode broadcasting standards such as DVB-T2, DVB-C2, and DVB-S2 in a single platform. The integrated receiver consists of a tuner block, a receiver engine, a frame processor, and an A/V decoder. The receiver engine includes a channel decoding engine and a demodulation engine to perform OFDM and APSK demodulations. The frame processor performs deinterleaving and BB frame decoding functions. The demodulator engine and the frame processor are implemented in two FPGA devices and DSP-based embedded software, respectively. To verify the functionality of the integrated receiver, it is tested in the laboratory. Commercial PC-based modulators are used to generate the DVB-T2, DVB-C2, and DVB-S2 modulated signals. The integrated receiver was tested under various operation modes as specified in the standards such as DVB-T2, DVB-C2, and DVB-S2 and showed successful operation in all the scenarios tested.

• Journal of the Korean Society for Nondestructive Testing
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• v.28 no.1
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• pp.9-15
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• 2008

A new ECT probe to separate the ECT signal distortion due to PVC (permeability variation clusters) and ordinary defects created in SG tubes has been developed. The hystersis loops of PVC which are extracted from retired SG (steam generator) tubes of Kori-1 NNP were measured. The tensile tests were performed to identify the mechanism of PVC creation. The conditions detecting the PVC created in 56 tubes were investigated using computer simulation, and the signal processing circuits were inserted in the probe for the digital signal transmission. The new Probe can measure and separate the PVC signal which is created in the SG tubes, and also measures the defects in Ni-sleeving part of SG tubes. furthermore the new ECT probe can measure the defects as fast as bobbin probe, and enhance the testing speed as well as reliability of the defect detection of SG tubes.

• Journal of KIISE:Software and Applications
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• v.30 no.11
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• pp.1015-1024
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• 2003

In [1] we proposed a method to generate a test model (GFSM) from a set of scenarios of embedded software. Each scenario describes the interaction sequences for an external input event. Although these external events are generated and accepted alternatively and concurrently by embedded software, we considered only the alternative relations. In this paper, we describe an improved algorithm to generate GFSM from concurrent scenarios, and propose methods to reduce the number of transitions in the GFSM. The first is the synchronous interpretation of message passing instead of asynchronous one considering the real behavior of tasks in embedded software. The others apply the partial order techniques to the GFSM using independent regions. We apply the method to generate a reduced GFSM of embedded software running on a digital TV.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.58-67
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• 2009

This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within $10{\mu}s$. It is implemented in a $0.18{\mu}m$ CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8 nV/$\sqrt{Hz}$ input referred noise, and 5-dBm $IIP_3$ at 60-mW power consumption. The power detector shows the 35dB dynamic range for 100 MHz input.