• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.469-477
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• 2003

This paper proposes a Carrier-Rotation (CR) PWM technique that is a new solution for the voltage unbalancing problem of flying capacitors in the Flying Capacitor Multi-level Inverter (FCMI). The proposed technique equalizes the utilization of phase leg voltage redundancies corresponding to the charging and the discharging state of individual flying capacitors during each switching period of all the switches. Therefore, the charging and the discharging quantity of flying capacitors are equal, which makes the average variation of flying capacitor voltages become zero and keeps their voltage stable during minimum specified period. It also has the reduced harmonic contents of output voltage and the same switch utilization since all the carrier signals are in phase and the switching frequency of each switch is identical. The proposed technique is analyzed precisely in flying capacitor 3-level inverter and then it has expanded to the FCMI (N-level, N>3). Experimental results on the laboratory prototype flying capacitor 3-level inverter confirm the validity of the proposed technique.

• Journal of IKEEE
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• v.22 no.4
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• pp.1006-1011
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• 2018

This paper proposes a three level buck converter utilizing multi-bit flying capacitor voltage control. The conventional three-level buck converter can not control the flying capacitor voltage, so that the operation is unstable or the circuit for controlling the flying capacitor voltage can not be applied to the PWM mode. Also when the load current is increased, an error occurs in the inductor voltage. The proposed structure can control the flying capacitor voltage in PWM mode by using differential difference amplifier and common mode feedback circuit. In addition, this paper proposes a 3bit flying capacitor voltage control circuit to optimize the operation of the three level buck converter depending on the load current, and a triangular wave generation circuit using the schmitt trigger circuit. The proposed 3-level buck converter is designed in $0.18{\mu}m$ CMOS process and has an input voltage range of 2.7V~3.6V and an output voltage range of 0.7V~2.4V. The operating frequency is 2MHz, the load current range is 30mA to 500mA, and the output voltage ripple is measured up to 32.5mV. The measurement results show a maximum power conversion efficiency of 85% at a load current of 130 mA.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.8-12
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• 2015

A Holographic data storage has some advantage of fast transmission, short access time and high storage capacity. However, it has several problems such as inter-symbol interference, inter-page interference and misalignment. Especially, for multi-level holographic data storage system, since one pixel contains more than 1bit, the system is more vulnerable to the error. In this paper, we propose a 3/4 modulation code which mitigate inter-symbol interference for 4-level holographic data storage.

• Nuclear industry
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• v.6 no.3 s.37
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• pp.76-78
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• 1986

• Ceramist
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• v.16 no.3
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• pp.44-53
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• 2013

• Journal of the Korea Society of Computer and Information
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• v.18 no.12
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• pp.21-26
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• 2013

In this paper, We are suggested methods of feature extraction in molecular images. The result of image transform DWT examination by suggested method, we are obtained as follows. 1-level and 2-levels of decomposition results showed the composition of the low frequency region. But, 3-level decomposition results did not appear in the data component is almost. Observed not with the naked eye is not, but the 3-level output data values of the results were decomposed. We are printed the horizontal and vertical directions of low-frequency region of the data, the high frequency region of the horizontal and vertical data, and diagonal high frequency region of the horizontal and vertical directions data. If the output data using molecular imaging and CT, PET, MR imaging will be compared with the data.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.3
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• pp.95-99
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• 2008

This paper proposes a new minimal resource high-level synthesis algorithm for low power design automation. The proposed algorithm executes an efficient approach to minimize the power consumption of the functional units in a circuit during the high level synthesis. In this paper, we visit all control steps one by one to reduce the switching activity in CDFG. The register sharing algorithm determines the minimum register after the life time analysis of all variable. According to property of input signal for functional unit, the proposed method visits all control step one by one and determines the resource allocation with minimal power consumption at each control step in a greedy fashion. The effect of the proposed algorithm has been proved through various filter benchmark to adopt a new scheduling and allocation algorithm considering the low rover.

• Journal of the Korea Computer Industry Society
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• v.3 no.9
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• pp.1251-1260
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• 2002

Real-time application programs have synchronization constraints which need to be met between media-data. Synchronization method represents feedback method including virtual client-side buffer. This buffer is used in buffer level method. It is client-leading synchronization that is absorbing variable transmission delay time and that is synchronizing by feedback control. It is the important factor for playback rate and QoS if the buffer level is normal or not. To solve the problems, we can control the start of transmission in multimedia server by appling filtering, control and network evaluation function. Synchronization method is processing for smooth presentation without cut-off while media is playing out. When audio frame which is master media is in high threshold buffer level we decrease play out time gradually, otherwise we increase it slowly.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.559-561
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• 2008

본 논문에서는 실용적이며 신뢰성 있는 고전압 대용량 유도전동기 구동용 H-브릿지 멀티레벨 인버터를 개발하여 산업 현장에 적용한 내용을 소개하였다. 실용적인 PWM (Pulse Width Modulation)과 PEBB (Power Electronics Building Blocks)에 기초한 신뢰성 있는 분산 제어를 적용하였으며, H-브릿지 멀티레벨 인버터를 이용한 유도 전동기 벡터 제어시의 위상지연을 보상하여 제어 성능을 향상시켰다. 또한, Power Cell 고장 발생시 시스템을 정지하지 않으면서 효율적 운전을 가능하게 하는 3상 불평형 제어를 이용하여 잉여성을 확보하였다. 다양한 전압과 용량의 H-브릿지 멀티레벨 인버터를 설계 및 제작하여 각종 부하 실험, 산업 현장 적용을 통해 적용된 방법의 타당성과 실용성을 입증하였다. 또한 실제 제품 설계, 생산, 판매, 유지 보수 과정을 통해 설계의 유연성, 생산의 효율성, 유지 보수의 편리함, 그리고 사용자 요구에 대한 대응성이 우수함을 확인하였다.

• The Journal of Korean Institute for Practical Engineering Education
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• v.3 no.1
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• pp.15-24
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• 2011

Modeling and simulation for Green Energy depends largely on the type of system under investigation. The topics are very wide ranging from semiconductor physics (solar), electrical motor/generator (wind turbines), power electronics (grid connections) to typical control strategies. To correctly model these technologies requires a broad set of models and various simulation techniques. To further refine or detail the simulation the modeling has to be performed on a specific level, being system, circuit or component level. Combinations of several levels allows gradually improving the validity of the overall model against available parameters and model equations.