• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.4
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• pp.323-330
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• 2002

In this paper, we have designed and fabricated an BWLL MMIC amplifier using GaAs PHEMT devices. We have optimized power divider/combiner size for small size of MMIC amplifier Using 0.2 ${\mu}$m AIGaAs/lnGaAs/GaAs PHEMT devices, the two stave MMIC amplifier has demonstrated a S$_{21}$ gain of 8.7 ㏈ with input/output return losses of lower than -10 ㏈ at 26.7 GHz. The size of this chip is 4.11 ${\times}$ 2.66 $\textrm{mm}^2$.

• Proceedings of the Korea Association of Information Systems Conference
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• 1997.10a
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• pp.321-326
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• 1997

본 논문은 3차원 그래픽 환경을 인터넷상에서 지원해 주는 VRML 2.0 명세를 이용 하여 만들어진 VRML 코드를 Parsing하여 화면에 3차원으로 브라우징 하는 웹브라우저인 사이버 뷰어 개발에 관한 것으로써, 마이크로 소프트사의 3차원 그래픽 라이브러리인 Direct 3D를 사용하여 개발하였다. 사이버 뷰어는 3차원 인터페이스 상에서 간단한 마우스 조작으로, 카메라 시점을 조정하여 Walking, Driving, Flying 등의 Navigation을 지원한다. 또한, Route와 Interpolation 기능을 통하여 각 객체들에 대한 병렬적인 이벤트 처리를 통하 여 실시간 대화형의 환경을 제공해준다.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2002.11a
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• pp.343-349
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• 2002

본 논문에서는 모듈성과 확장성을 갖는 시스톨릭 어레이를 이용한 FIR(finite impulse response) 디지털필터의 구현에 대하여 기술한다. 차분방정식 혹은 전달함수가 주어질 때 기본소자를 이용한 FIR 디지털필터 설계를 위한 2차원 DG(dependence graph)로부터 1차원 시스톨릭 어레이를 유도한 후 유도된 시스톨릭 어레이를 RT 수준에서 VHDL로 모델링하여 동작을 검증하였다 검증된 시스톨릭 어레이를 이용한 FIR 디지털필터는 Hynix에서 제공하는 0.35$\mu\textrm{m}$ 셀 라이브러리와 FPGA칩인 XCV200E을 사용하여 합성 및 구현되었다.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.11a
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• pp.343-349
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• 2002

본 논문에서는 모듈성과 확장성을 갖는 시스톨릭 어레이를 이용한 FIR(finite impulse response) 디지털필터의 구현에 대하여 기술한다. 차분방정식 혹은 전달함수가 주어질 때 기본소자를 이용한 FIR 디지털필터 설계를 위한 2차원 DG(dependence graph)로부터 1차원 시스톨릭 어레이를 유도한 후 유도된 시스톨릭 어레이를 RT 수준에서 VHDL로 모델링하여 동작을 검증하였다. 검증된 시스톨릭 어레이를 이용한 FIR 디지털필터는 Hynix에서 제공하는 0.35$\mu\textrm{m}$ 셀 라이브러리와 FPGA칩인 XCV200E을 사용하여 합성 및 구현되었다.

• Proceedings of the Korea Multimedia Society Conference
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• 2002.05c
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• pp.44-48
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• 2002

본 논문에서는 한국형 디지털 서명 표준인 KCDSA에서 사용할 목적으로 개발된 국내 해쉬 함수 표준인 HAS-160 알고리즘을 VLSI 설계하였다. 하나의 단계연산을 하나의 클럭에 동작하고 단계연산의 핵심이 되는 4개의 직렬 2/sup 3/ 모듈러 가산기를 CSA(Carry Save Adder)로 구현하여 캐리 전파시간을 최소로 하고 HAS-160 해쉬 알고리즘의 특징인 메시지 추가생성을 사전에 계산하여 지연시간을 줄이는 설계를 하였다. 설계된 해쉬 프로세서를 0.25 urn CMOS 스탠다드 셀 라이브러리에서 합성한 결과 총 게이트 수는 약 21,000개이고 최대 지연 시간은 5.71 ns로 최대 동작주파수 약 175 MHz서 약 1,093 Mbps의 성능을 얻을 수 있었다.

• Journal of the Korean Chemical Society
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• v.46 no.4
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• pp.336-345
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• 2002

In this study, we have screened $Eu^{3+}$- and $Tb^{3+}$-activated candidate phosphors for PDP in the sys-tems of CaO-Gd$_2$O$_3$-Al$_2$O$_3$ by combinatorial chemistry and investigated the synthetic temperature, optimum com-position and luminescent properties about the candidate phosphors. To construct the emission intensity library by VUV PL, we have synthesized 210 different compositional samples using a polymerized-complex method. Good luminescent samples were identified by X-ray diffraction method. $Ca_$\alpha$$G$d_{0.95-$\alpha$-$\beta$}Al_$\beta$O_$\delta$$ : Eu(0.02< $\alpha$+$\beta$ <0.04) phos-phors screened as a red phosphor have good color purity than commercial phosphor. In the candidate phosphors of CaGdAl$_3O_7$ : Tb, Ca$Al_{12}O_{19}$ : Tb, Gd$_4$Al$_2O_9$ : Tb, and Gd$_3Al_5O_{12}$ : Tb CaGdAl$_3O_7$ : Tb, and Ca$Al_{12}O_{19}$ : Tb have shorter decay time than commercial phosphor.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.3
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• pp.493-501
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• 2020

For the obfuscation of Flow Analysis on the Android operating system, the size of the Flow Graph can be large enough to make analysis difficult. To this end, a library in the form of aar was implemented so that it could be inserted into the application in the form of an external library. The library is designed to have up to five child nodes from the entry point in the dummy code, and for each depth has 2n+1 numbers of methods from 100 to 900 for each node, so it consists of a total of 2,500 entry points. In addition, entry points consist of a total of 150 views in XML, each of which is connected via asynchronous interface. Thus, the process of creating a Inter-procedural Control Flow Graph has a maximum of 14,175E+11 additional cases. As a result of applying this to application, the Inter Procedure Control Flow Analysis too generates an average of 10,931 edges and 3,015 nodes with an average graph size increase of 36.64%. In addition, in the APK analyzing process showed that up to average 76.33MB of overhead, but only 0.88MB of execution overhead in the user's ART environment.

• Journal of Korean Society for Quality Management
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• v.46 no.4
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• pp.1015-1028
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• 2018

Purpose: This study attempts to find how the cultural marketing activities utilizing cultural space affect firm's brand image and brand loyalty, and whether this culture marketing technique is recognized as a social contribution activity by potential customers and thereby influence brand image and loyalty. Methods: The data was collected by using the structured questionnaires to consumers who have experience using the Naver Library, Starfield Library, and Hyundai Card Library. The proposed research model is tested using 178 valid questionnaires using Smart PLS 2.0. Results: This research indicated that among cultural marketing factors, cultural support and cultural promotion have little impact on brand image, whereas culture firm influence brand image. Brand image also had an impact on brand loyalty, but it was found that public libraries operated by companies were not recognized as corporate social contribution activities, nor did they have an impact on the formation of the company's brand image. Conclusions: The study offered a theoretical and empirical foundation for future research by empirically identifying the relationship between cultural marketing and brand image and loyalty and confirmed the coordinating effect of social contribution activities between a cultural firm and its brand image.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.641-644
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• 1998

In this paper, wideband MMIC LNA's were designed using low Q matching network. gains of 23.6~25.4dB $(24.5\pm0.9dB),$ noise figures of 0.9~2.8 dB were obtained from the designed wideband MMIC LNA in the frequency ranges of 1.2~2.8㎓. And, P1dB of 10.13 dBm, IP3 of 12.25 dB were obtained at the center frequency of 2 ㎓. A chip size of the designed wideband MMIC LNA is 1.4mm$\times$1.4mm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.11
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• pp.59-66
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• 2000

As multimedia applications become popular, computers increasingly require high-speed DSP for 3-DIM computer graphic. In this Paper, a Macro-cell Library of conditional select adder/subtracter is proposed for DSP within high speed and low power consumption. Using, this design method, we are able to obtain an auto generation of the adder or(and) subtracter from 8-bit to 64-bit. The proposed adder/subtracter has been fabricated with a 0.25${\mu}m$, single-poly, five-metal, N-well CMOS technology. From the experimental results, delay time is 3.43ns, and the power consumption is 42.8${\mu}w$/MHz at the input frequency of 50MHz, at 2.5V single power supply, in case of the 32-bit adder/subtracter.