• 제목/요약/키워드: 라이브러리 표준

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Efficient Method for Selecting Ground Motions with a Mean Response Spectrum Matching a Target Spectrum (목표스펙트럼에 근사한 평균응답스펙트럼을 갖는 지반운동집단의 효율적인 선정방법)

  • Han, Sang-Whan;Seok, Seung-Wook
    • Journal of the Earthquake Engineering Society of Korea
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    • v.15 no.5
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    • pp.1-10
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    • 2011
  • This paper proposes an efficient method for selecting ground motions with the mean response spectrum matching a target spectrum. Since former studies reported that the shape and amplitude of the response spectra can be treated independently for selecting ground motions, this study first selects ground motions such that the shape of their mean response spectrum matches that of the target spectrum, then scales the ground motions. To select the ground motions best matching the shape of the target response spectrum, the standard deviation of the difference between the target response spectrum and the mean response spectrum of the selected ground motions needs to be minimized. Unlike the existing procedure, the scaling factor can be computed without iteration. Based on the selection results of 7 ground motions from a library of 40 ground motions, the proposed method is verified as an accurate and efficient method.

Implementing a set of Direct3D Functions on OpenGL (OpenGL을 이용한 Direct3D 기능의 구현)

  • Do, Joo-Young;Baek, Nak-Hoon
    • The Journal of the Korea Contents Association
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    • v.11 no.11
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    • pp.19-27
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    • 2011
  • In this paper, we present an emulation library for the essential features and their API function calls provided by Direct3D, the most actively used API for computer game-related application programs on the MS-Windows-based desktop's, with OpenGL library in the Linux environment. In typical Linux-based systems, only the X window system and OpenGL graphics library are available. There are lots of needs for this kind of emulation library to convert the Direct3D-based game applications and user interfaces on these systems. Through carefully selecting the essential API functions from the DirectX version 9.0, we obtained the prototype implementation of that emulation library, to finally get the final full-scale DirectX implementation. Our implementation currently covers 3D coordinate transformations, light and material processing, texture mapping, simple animation features and more. We showed its feasibility through successfully executing a set of Direct3D demonstration programs including a real-world game character animation on our implementation.

Development of a SDTS Data Conversion System for GOTHIC (GOTHIC을 위한 SDTS 데이타 변환 시스템의 개발)

  • Zhang, Yan-Sheng;Kim, Jun-Jong;Han, Ki-Joon;Yun, Jae-Kwan
    • Journal of Korea Spatial Information System Society
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    • v.2 no.2 s.4
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    • pp.99-115
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    • 2000
  • A geographic information system (GIS) generally has a great deal of geographic data and has a singular storage structure individually. It is very hard to exchange geographic data between geographic information systems which store their geographic data with incompatible formats. Moreover, since it needs large amount of storage space to store geographic data and expensive cost to input them. In this paper, we designed and implemented a SDTS (Spatial Data Transfer Standard) Data Conversion System for Gothic which is an existing geographic information system. In order to convert geographic data without loss of information, we first carefully define a mapping between SDTS data and Gothic data. Especially, since SDTS data are in the format of ISO8211, the FIPS123 library is used to access them. Because the internal data format of Gothic is not open to the public, we also use the Gothic library to access Gothic data. The SDTS data conversion system developed in this paper uses an intermediate file to convert geographic data efficiently. In addition, we use UIL (User Interface Language) to implement a graphic user interface (GUI) of our system.

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OpenGL ES 2.0 Emulation on Desktop PCs (데스크탑 상에서의 OpenGL ES 2.0 에뮬레이션)

  • Baek, Nakhoon
    • KIPS Transactions on Computer and Communication Systems
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    • v.3 no.4
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    • pp.125-128
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    • 2014
  • OpenGL ES(OpenGL for Embedded System) 2.0 is one of the most widely used 3D graphics API(application progrma interface) standard for smart phones and tablet PCs at this time. During programming with this API, they prefer desktop environment rather than the target mobile environment, which has relatively low computing power. Thus, we need to emulate the OpenGL ES 2.0 API on the desktop PCs, where only OpenGL API libraries are available. In this paper, we present technical difficulties and their solutions to emulate OpenGL ES 2.0 on desktop PCs. Our final implementation of OpenGL ES 2.0 emulation library works on desktop PCs and passed over more than 96% of the official CTS(conformance test suites) to prove the correctness of our implementation. Additionally, for the commercially available benchmark programs, our implementation shows equivalent execution speeds to the previous commercial OpenGL ES 2.0 implementations.

Implementation Of Wireless Telephony Application Server (무선 텔레포니 에플리케이션 서버의 구현)

  • Choi, Chul-Oong;Jang, Ji-San;Lee, Jung-Eun;Kim, Min-Soo;Shin, Dong-Kyoo;Shin, Dong-Il
    • Annual Conference of KIPS
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    • 2001.04a
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    • pp.561-564
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    • 2001
  • 본 논문은 무선 에플리케이션 프로토콜 Specification에서 제시하고 있는 WTA(Wireless Telephony Application) 를 기초로 네트워크에서 발생한 실시간 Event를 처리할 수 있는 모바일 클라이언트 및 WTA서버에 대한 설계와 구현에 대해서 기술한다. 또한 네트워크 이벤트 및 사용자가 발생시킨 이벤트를 디바이스에 독립적으로 처리할 수 있는 WTA 라이브러리와 필요한 컨텐츠를 실시간으로 브라우징하기 위한 Repository 에 대해 기술한다. 전체적인 WTA 환경 구조는 크게 2개의 물리적 구조인 Mobile Client와 WTA Server로 구현되어있다. Mobile Client의 내부 모듈은 표준 WAE 사용자 에이전트(Standard WAE User Agent)의 확장인 WTA 사용자 에이전트 모듈(WTA User-Agent Module), 필요한 resource를 서버로 요청하고 저장하는 채널 인스톨 모듈(Channel Install Module), network로부터 발생한 Event를 처리하는 이벤트 핸들러 모듈(Event Handler Module), mobile network 기능들(e.g. setting up calls)과 device specific feature(e.g. manipulating the phonebook)를 다루는 WTA 스크립트 라이브러리(WTA Script Library), Phonebook 엑세스 모듈(Phonebook Access Module), 실시간으로 즉각 이벤트에 반응하기 위한 Repository로 구성되어있고, WTA Server는 Client가 요청한 Content(services)를 전달 해 주는 컨텐트 전달 모듈(Content Deliver Module)과 서버 Phonebook 엑세스 모들(Server Phonebook Access Module)로 구성되어 있다.

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An efficient hardware implementation of 64-bit block cipher algorithm HIGHT (64비트 블록암호 알고리듬 HIGHT의 효율적인 하드웨어 구현)

  • Park, Hae-Won;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.9
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    • pp.1993-1999
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    • 2011
  • This paper describes a design of area-efficient/low-power cryptographic processor for HIGHT block cipher algorithm, which was approved as standard of cryptographic algorithm by KATS(Korean Agency for Technology and Standards) and ISO/IEC. The HIGHT algorithm, which is suitable for ubiquitous computing devices such as a sensor in USN or a RFID tag, encrypts a 64-bit data block with a 128-bit cipher key to make a 64-bit cipher text, and vice versa. For area-efficient and low-power implementation, we optimize round transform block and key scheduler to share hardware resources for encryption and decryption. The HIGHT64 core synthesized using a 0.35-${\mu}m$ CMOS cell library consists of 3,226 gates, and the estimated throughput is 150-Mbps with 80-MHz@2.5-V clock.

An implementation of block cipher algorithm HIGHT for mobile applications (모바일용 블록암호 알고리듬 HIGHT의 하드웨어 구현)

  • Park, Hae-Won;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.125-128
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    • 2011
  • This paper describes an efficient hardware implementation of HIGHT block cipher algorithm, which was approved as standard of cryptographic algorithm by KATS(Korean Agency for Technology and Standards) and ISO/IEC. The HIGHT algorithm, which is suitable for ubiquitous computing devices such as a sensor in USN or a RFID tag, encrypts a 64-bit data block with a 128-bit cipher key to make a 64-bit cipher text, and vice versa. For area-efficient and low-power implementation, we optimize round transform block and key scheduler to share hardware resources for encryption and decryption. The HIGHT64 core synthesized using a $0.35-{\mu}m$ CMOS cell library consists of 3,226 gates, and the estimated throughput is 150-Mbps with 80-MHz@2.5-V clock.

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A Design of LDPC Decoder for IEEE 802.11n Wireless LAN (IEEE 802.11n 무선 랜 표준용 LDPC 복호기 설계)

  • Jung, Sang-Hyeok;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.31-40
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    • 2010
  • This paper describes a LDPC decoder for IEEE 802.11n wireless LAN standard. The designed processor supports parity check matrix for block length of 1,944 and code rate of 1/2 in IEEE 802.11n standard. To reduce hardware complexity, the min-sum algorithm and layered decoding architecture are adopted. A novel memory reduction technique suitable for min-sum algorithm was devised, and our design reduces memory size to 25% of conventional method. The LDPC decoder processor synthesized with a $0.35-{\mu}m$ CMOS cell library has 200,400 gates and memory of 19,400 bits, and the estimated throughput is about 135 Mbps at 80 MHz@2.5v. The designed processor is verified by FPGA implementation and BER evaluation to validate the usefulness as a LDPC decoder.

Design of Sub-pixel Interpolation Circuit for Real-time Multi-decoder Supporting 4K-UHD Video Images (4K-UHD 영상을 지원하는 실시간 통합 복호기용 부화소 보간 회로 설계)

  • Lee, Sujung;Cho, Kyeongsoon
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.1-9
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    • 2015
  • This paper proposes the design of sub-pixel interpolation circuit for real-time multi-decoder supporting 4K-UHD video images. The proposed sub-pixel interpolation circuit supports H.264, MPEG-4, VC-1 and new video compression standard HEVC. The common part of the interpolation algorithm used in each video compression standard is shared to reduce the circuit size. An intermediate buffer is effectively used to reduce the circuit size and optimize the performance. The proposed sub-pixel interpolation circuit was synthesised by using 130nm standard cell library. The synthesized gate-level circuit consists of 122,564 gates and processes 35~86 image frames per second for 4K-UHD video at the maximum operation frequency of 200MHz. Therefore, the proposed circuit can process 4K-UHD video in real time.

Hardware Implementation of EBCOT TIER-1 for JPEG2000 Encoder (JPEG2000 Encoder를 위한 EBCOT Tier-1의 하드웨어 구현)

  • Lee, Sung-Mok;Jang, Won-Woo;Cho, Sung-Dae;Kang, Bong-Soon
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.2
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    • pp.125-131
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    • 2010
  • This paper presents the implementation of a EBCOT TIER-1 for JPEG2000 Encoder. JPEG2000 is new standard for the compression of still image for overcome the artifact of JPEG. JPEG2000 standard is based on DWT(Discrete Wavelet Transform) and EBCOT Entropy coding technology. EBCOT(Embedded block coding with optimized truncation) is the most important technology that is compressed the image data in the JPEG2000. However, EBCOT has the artifact because the operations are bit-level processing and occupy the harf of the computation time of JPEG2000 Compression. Therefore, in this paper, we present modified context extraction method for enhance EBCOT computational efficiency and implemented MQ- Coder as arithmetic coder. The proposed system is implemented by Verilog-HDL, under the condition of TSMC 0.25um ASIC library, gate counts are 30,511EA and satisfied the 50MHz operating condition.