• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.5
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• pp.63-68
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• 2016

Audio mixer is an electronic device which performs a mixing of multiple audio signals. Digital mixer having various functions and scalability is spreaded thanks to advanced DSP and IT technology. However, digital mixer is more vulnerable to stability comparing to conventional analog mixer in the digital error or software error sense because its control is executed by SW. To solve this problem, in this paper, we propose a multi-channel digital analog hybrid mixer scheme, digital mixer error detection mechanism and malfunctioning switching technique. Also we develop the audio mixer having digital-analog hybrid structure. By simulation, we can sense the error of digital mixer except power loss in a 120ms, change into analog mixer mode automatically and provide continuous broadcasting function without mixer function loss.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.6
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• pp.30-39
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• 2017

A digital calibration technique based on digital-domain averaging for cyclic ADC is proposed. The proposed calibration compensates for nonlinearity of ADC due to capacitance mismatch of capacitors in 1.5-bit/stage MDAC. A 1.5-bit/stage MDAC with non-matched capacitors has symmetric residue plots with respect to the ideal residue plot. This intrinsic characteristic of residue plot of MDAC is reflected as symmetric A/D transfer functions. A corrected A/D transfer function can be acquired by averaging two transfer functions with non-linearity, which are symmetric with respect to the ideal analog-digital transfer function. In order to implement the aforementioned averaging operation of analog-digital transfer functions, a 12-bit cyclic ADC of this work defines two operational modes of 1.5-bit/stage MDAC. By operating MDAC as the first operational mode, the cyclic ADC acquires 12.5-bits output code with nonlinearity. For the same sampled input analog voltage, the cyclic ADC acquires another 12.5-bits output code with nonlinearity by operating MDAC as the second operational mode. Since analog-digital transfer functions from each of operational mode of 1.5-bits/stage MDAC are symmetric with respect to the ideal analog-digital transfer function, a corrected 12-bits output code can be acquired by averaging two non-ideal 12.5-bits codes. The proposed digital calibration and 12-bit cyclic ADC are implemented by using a $0.18-{\mu}m$ CMOS process in the form of full custom. The measured SNDR(ENOB) and SFDR are 65.3dB (10.6bits) and 71.7dB, respectively. INL and DNL are measured to be -0.30/-0.33LSB and -0.63/+0.56LSB, respectively.

• Journal of Convergence for Information Technology
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• v.9 no.9
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• pp.38-43
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• 2019

In this paper, a method of inputting one analog input and two digital switch inputs by using one analog port of microcontroller embedded in IoT device was proposed. In this method, the upper limit and the lower limit of the input voltage range of the analog input port are determined, and the analog input voltage is input to this interval. The digital switches are configured to exceed the boundaries of the upper and lower limits, respectively. To verify the performance of the proposed method, an experimental circuit was constructed and tested using a microcontroller. As a result, all three inputs can be sensed using a single analog port, thus confirming that the three required input ports are reduced to one input port, ie, 33%.

• Journal of Digital Convergence
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• v.11 no.6
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• pp.1-9
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• 2013

The digital signal is terminated on Dec.31, 2012. But most of the analog cable subscribers are faced with the difficult reception of the digital because the government has defined the terrestrial broadcast as digital transition obligation operators. It is estimated that half analog of the total pay-TV subscriber that is approximately 10million households that are directly receiving terrestrial signal must hold the digital TV or DtoA convertor to transit digital. But cable system subscriber should buy Set-top box that are expensive and pay the expensive rates. The cast of analog cable subscribers has been classified as a group that can cause the most damage after digital switch. This study investigate the problem, and cause, solution of the analog cable subscribers that are placed in the blind spots of the digital switch.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.2
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• pp.378-384
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• 2013

In this paper, a CMOS temperature sensor is proposed to measure the internal temperature of a chip. The temperature sensor consists of a proportional-to-absolute-temperature (PTAT) circuit for a temperature sensing part and a 4-bit analog-to-digital converter (ADC) for a digital interface. The PTAT circuit with the compact area is designed by using a vertical PNP architecture in the CMOS process. To reduce sensitivity of temperature variation in the digital interface circuit of the proposed temperature sensor, a 4-bit successive approximation (SA) ADC using the minimum analog circuits is used. It uses a capacitor-based digital-to-analog converter and a time-domain comparator to minimize power consumption. The proposed temperature sensor was fabricated by using a $0.25{\mu}m$ 1-poly 6-metal CMOS process with a 2.5V supply, and its operating temperature range is from 50 to $150^{\circ}C$. The area and power consumption of the fabricated temperature sensor are $130{\times}390{\mu}m^2$ and $868{\mu}W$, respectively.

• Journal of Biomedical Engineering Research
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• v.19 no.4
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• pp.351-360
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• 1998

Digital gamma camera has many advantages over analog gamma camera. These include convenient quality control, easy calibration and operation, and possible image quantitation which results in improving diagnostic accuracies. The digital data can also be utilized for telemedicine and picture archiving and communication system. However, many hospitals still operate analog cameras and have difficult situation to replace them with digital cameras. We have studied a feasibility of digitalizing an analog gamma camera into a digital camera using Gamma-PF interface board. The physical characteristics that we have measured are spatial resolution, sensitivity, uniformity, and image contrast. The patient's data obtained for both analog and digital camera showed very similar image quality. The results suggest that it may be feasible to upgrade an analog camera into a digital gamma camera in clinical environments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.39-46
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• 2005

A DC-DC converter with digital controller is realized. the digital controller has several advantages such as robustness, fast design time, and high flexibility. however, since the DC-DC output voltage is analog, an analog-to-digital conversion scheme is always essential in all digital controllers. A simple and efficient delta-sigma modulator is used as a conversion scheme in out implementation. The measurement results show good voltage regulation

• The Journal of the Convergence on Culture Technology
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• v.4 no.4
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• pp.379-385
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• 2018

The transmission of analog signals through Galvanic isolators often results in signal distortion. Optocoupler gain is temperature dependent and also varies considerably, which would cause deformations of analog signals. Digital isolators have better noise immunity than analog, and digital transmission is a cost-effective noise rejection method for multichannel analog signals, which can solve temperature-induced signal distortion problems. Digital data, converted from multichannel analog signals, can be transmitted through a single optocoupler. We proposed advanced circuits and data frame for robust transmission of multichannel analog signals. Numerical experiments were performed to investigate distortion of multichannel analog signals during transmission.

• KIPE Magazine
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• v.9 no.3
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• pp.23-27
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• 2004

ADuC84x는 OP-AMP 아날로그-디지털 컨버터(ADC), 디지털-아날로그 컨버터(DAC)로 유명한 ADI(아날로그 디바이스사)의 8비트 임베디드 마이크로콘트롤러인 마이크로컨버터이다. ADI의 마이크로컨버터 ADuC84x는 산업용 정밀제어 및 계측용 애플리케이션의 고성능 신호처리를 위해 설계된 프로그래머블 고속 임베디드 마이크로콘트롤러이다.(중략)

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.225-228
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• 2012

In this paper, a 10-bit digital-to-analog converter (DAC) with small area is proposed. The 10-bit DAC consists of a 8-bit decoder, a 2-bit time-interpolator, and a buffer amplifier. The proposed time-interpolation is achieved by controlling the charging time through a low-pass filter composed of a resistor and a capacitor. To implement the accurate time-interpolator, a control pulse generator using a replica circuit is proposed to minimize the effect of the process variation. The proposed 10-bit Time-Interpolation DAC occupies 61 % of the conventional 10-bit resistor-string DAC. The proposed DAC is designed using a $0.35{\mu}m$ CMOS process with a 3.3 V supply. The simulated DNL and INL are +0.15/-0.21 LSB and +0.15/-0.16 LSB, respectively.