• Title/Summary/Keyword: 듀얼채널

Search Result 32, Processing Time 0.022 seconds

SOI 기판 위에 SONOS 구조를 가진 플래쉬 메모리 소자의 subthreshold 전압 영역의 전기적 성질

  • Yu, Ju-Tae;Kim, Hyeon-U;Yu, Ju-Hyeong;Kim, Tae-Hwan
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2010.08a
    • /
    • pp.216-216
    • /
    • 2010
  • Floating gate를 이용한 플래시 메모리와 달리 질화막을 트랩 저장층으로 이용한 silicon-oxide-silicon nitride-oxide silicon (SONOS) 구조의 플래시 메모리 소자는 동작 전압이 낮고, 공정과정이 간단하며 비례 축소가 용이하여 고집적화하는데 유리하다. 그러나 SONOS 구조의 플래시 메모리소자는 비례 축소함에 따라 단 채널 효과와 펀치스루 현상이 커지는 문제점이 있다. 비례축소 할 때 발생하는 문제점을 해결하기 위해 플래시 메모리 소자를 FinFET과 같이 구조를 변화하는 연구는 활발히 진행되고 있으나, 플래시 메모리 소자를 제작하는 기판의 변화에 따른 메모리 소자의 전기적 특성 변화에 대한 연구는 많이 진행되지 않았다. 본 연구에서는 silicon-on insulator (SOI) 기판의 유무에 따른 멀티비트를 구현하기 위한 듀얼 게이트 가진 SONOS 구조를 가진 플래시 메모리 소자의 subthreshold 전압 영역에서의 전기적 특성 변화를 조사 하였다. 게이트 사이의 간격이 감소함에 따라 SOI 기판이 있을 때와 없을 때의 전류-전압 특성을 TCAD Simulation을 사용하여 계산하였다. 전류-전압 특성곡선에서 subthreshold swing을 계산하여 비교하므로 SONOS 구조의 플래시 메모리 소자에서 SOI 기판을 사용한 메모리 소자가 SOI 기판을 사용하지 않은 메모리 소자보다 단채널효과와 subthreshold swing이 감소하였다. 비례 축소에 따라 SOI 기판을 사용한 메모리 소자에서 단채널 효과와 subthreshold swing이 감소하는 비율이 증가하였다.

  • PDF

2.4/5GHz Dual-Band RF Design and Implementation and Performance Evaluation (2.4/5GHz 이중대역 RF 설계 및 구현과 성능 평가)

  • Byung-Ik Jung;Gyeong-Hyu Seok
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.18 no.5
    • /
    • pp.755-760
    • /
    • 2023
  • In this paper, the 2.4/5GHz dual band was used to ensure the reliability and stability of the wireless AV surveillance system using the existing 2.4GHz band. The proposed system supports dynamic channel allocation and channel change technology to avoid interference from other signals (Wifi, Bluetooth, etc.), reduces maintenance costs incurred when building wireless CCTV, and can be linked with existing wired CCTV. The service area of the A/V surveillance system used can be expanded.

T-DMB multimedia service system development using IPv6 (IPv6를 이용한 T-DMB 멀티미디어 서비스 시스템 개발)

  • Jang, Jeong-Uk;In, Chi-Ho
    • 한국ITS학회:학술대회논문집
    • /
    • v.2006 no.10
    • /
    • pp.199-202
    • /
    • 2006
  • 본 논문에서는 IPv6를 이용한 새로운 T-DMB 멀티미디어 서비스 시스템을 설계 및 구현하였다. 본 논문에서 제안한 방식은 IPv6의 듀얼스택 기술인 DSTM 방식을 T-DMB 패킷 전송 서비스에 접목시켰다. IPv6의 주소 체계 방식을 이용하여 기존의 T-DMB와의 호환성을 유지하면서 T-DMB 단말 내에 DSTM 패킷 전송을 위한 어플리케이션 데이터 테이블을 배치하여 T-DMB in IPv6 터널링을 통한 서비스를 실행할 수 있게 하였다. 또한, T-DMB Client 와 DSTM TEP를 단말에 배치하여 패킷 전송을 가능하게 하였다. T-DMB in IPv6 터널링 기술을 도입하여 T-DMB 방송 시스템의 성능 평가를 실시한 결과, 기존의 T-DMB 방송 서비스보다 약 2배 정도의 전송 용량 증가 및 채널 용량 증가가 효과를 바로 볼 수 있었고, 패킷 크기 따른 전송 효과는 기존의 방송 서비스보다 약 3%정도 증가된 결과 값을 얻을 수 있었다.

  • PDF

Performance of 3D HDTV Transmission with Block LDPC Codes (블록 LDPC 부호를 사용한 3D HDTV 전송 성능개선 방안 연구)

  • Kim, Min-Ki;Kim, Dong Ho
    • Journal of Satellite, Information and Communications
    • /
    • v.8 no.4
    • /
    • pp.21-25
    • /
    • 2013
  • The dual-stream based stereoscopic 3D HDTV broadcasting service was launched recently. Although the dual-stream based HDTV service has been successfully provided, the 3D HDTV broadcasting system requires more bandwidth efficient transmission schemes because it should convey both left and right HD resolution images simultaneously in the finite 6MHz bandwidth. In this paper, we consider more advanced ATSC transmission schemes that use higher modulation such as 16-QAM and concatenated RS code and block LDPC codes. Compared with conventional ATSC system and the modified ATSC system in [2], the proposed system has about 2.97dB and 1.12dB SNR gain at the payload data rate of 19.44Mbps compared with the existing ATSC system and the modified ATSC system [2]. Also, the proposed scheme requires only 1.05dB power increase for the 3D HDTV service, which is reasonable SNR increase value and applicable to the advanced 3D high definition broadcasting realization in limited 6MHz bandwidth.

2-Channel DC-DC Converter for OLED Display with RF Noise Immunity (RF 노이즈 내성을 가진 OLED 디스플레이용 2-채널 DC-DC 변환기)

  • Kim, Tae-Un;Kim, Hak-Yun;Choi, Ho-Yong
    • Journal of IKEEE
    • /
    • v.24 no.3
    • /
    • pp.853-858
    • /
    • 2020
  • This paper proposes a 2-ch DC-DC converter for OLED display with immunity against RF noise inserted from communication device. For RF signal immunity, an input voltage variation reduction circuit that attenuates as much as the input voltage variation is embedded. The boost converter for positive voltage VPOS operates in SPWM-PWM dual mode and has a dead time controller to increase power efficiency. The inverting charge pump for negative voltage VNEG is a 2-phase scheme and operates in PFM using VCO to reduce output ripple voltage. Simulation results using 0.18 ㎛ BCDMOS process show that the overshoot and undershoot of the output voltage decrease from 10 mV to 2 mV and 5 mV, respectively. The 2-ch DC-DC converter has power efficiency of 39%~93%, and the power efficiency of the boost converter is up to 3% higher than the conventional method without dead time controller.

A dual-loop boost-converter LED driver IC with temperature compensation (온도 보상 및 듀얼 루프를 이용한 부스트 컨버터 LED 드라이버 IC)

  • Park, Ji-Hoon;Yoon, Seong-Jin;Hwang, In-Chul
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.20 no.6
    • /
    • pp.29-36
    • /
    • 2015
  • This paper presents an LED backlight driver IC consisting of three linear current regulators and an output-voltage regulation loop with a self-adjustable reference voltage. In the proposed LED driver, the output voltage is controlled by dual feedback loops. The first loop senses and controls the output voltage, and the second loop senses the voltage drop of the linear current regulator and adjusts the reference voltage. With these feedback loops, the voltage drop of the linear current regulator is maintained at a minimum value, at which the driver efficiency is maximized. The output of the driver is a three-channel LED setup with four LEDs in each channel. The luminance is adjusted by the PWM dimming signal. The proposed driver is designed by a $0.35-{\mu}m$ 60-V high-voltage process, resulting in an experimental maximum efficiency of approximately 85%.

Outage Performance Analysis of Partial Relay Selection Based Opportunistic Cooperation in Decode-and-Forward Relaying Systems (디코딩 후 전달 중계 시스템에서 부분 중계 노드 선택 기법 기반 기회적 협력 방식의 아웃티지 성능 분석)

  • Lee, Sangjun;Lee, In-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.8
    • /
    • pp.1804-1810
    • /
    • 2013
  • In this paper, we study the opportunistic cooperation scheme that improves the outage performance through the efficient selection between a cooperative mode and a non-cooperative mode. Especially, in decode-and-forward relaying systems, we analyze the outage performance for the opportunistic cooperation using partial relay selection, where closed-form expressions of exact and asymptotic outage probabilities are derived assuming independent and identically distributed Rayleigh fading channels. In the numerical results, we verify the derived expressions, and investigate the outage performances for various target data rates and different numbers of relays. Also, we compare the outage performances of the conventional cooperation scheme and the opportunistic cooperation scheme.

Design of Highly Integrated 3-Channel DC-DC Converter Using PTWS for Wearable AMOLED (PTWS를 적용한 웨어러블 AMOLED용 고집적화 3-채널 DC-DC 변환기 설계)

  • Jeon, Seung-Ki;Lee, Hui-Jin;Choi, Ho-Yong
    • Journal of IKEEE
    • /
    • v.23 no.3
    • /
    • pp.1061-1067
    • /
    • 2019
  • In this paper, a highly integrated 3-channel DC-DC converter is designed using power transistor width scaling (PTWS). For positive voltage, $V_{POS}$, a boost converter is designed using the set-time variable pulse width modultaion (SPWM) dual-mode and PTWS to improve efficiency at light load. For negative voltage, $V_{NEG}$, a 0.5 x regulated inverting charge pump is designed with pulse skipping modulation (PSM) controller to reduce power consumption, and for an additional positive voltage, $V_{AVDD}$, a LDO circuit is designed. The proposed DC-DC converter has been designed using a $0.18{\mu}m$ BCDMOS process. Simulation results show that the proposed converter has power efficiency of 56%~90% for load current range of 1 mA~70 mA and output ripple voltage less than 5 mV at positive voltage.

Privacy Amplification of Quantum Key Distribution Systems Using Dual Universal Hush Function (듀얼 유니버셜 해쉬 함수를 이용한 양자 키 분배 시스템의 보안성 증폭)

  • Lee, Sun Yui;Kim, Jin Young
    • Journal of Satellite, Information and Communications
    • /
    • v.12 no.1
    • /
    • pp.38-42
    • /
    • 2017
  • This paper introduces the concept of a dual hash function to amplify security in a quantum key distribution system. We show the use of the relationship between quantum error correction and security to provide security amplification. Also, in terms of security amplification, the approach shows that phase error correction offers better security. We describe the process of enhancing security using the universal hash function using the BB84 protocol, which is a typical example of QKD. Finally, the deterministic universal hash function induces the security to be evaluated in the quantum Pauli channel without depending on the length of the message.

Distributed Throughput-Maximization Using the Up- and Downlink Duality in Wireless Networks (무선망에서의 상하향 링크 쌍대성 성질을 활용한 분산적 수율 최대화 기법)

  • Park, Jung-Min;Kim, Seong-Lyun
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.36 no.11A
    • /
    • pp.878-891
    • /
    • 2011
  • We consider the throughput-maximization problem for both the up- and downlink in a wireless network with interference channels. For this purpose, we design an iterative and distributive uplink algorithm based on Lagrangian relaxation. Using the uplink power prices and network duality, we achieve throughput-maximization in the dual downlink that has a symmetric channel and an equal power budget compared to the uplink. The network duality we prove here is a generalized version of previous research [10], [11]. Computational tests show that the performance of the up- and downlink throughput for our algorithms is close to the optimal value for the channel orthogonality factor, ${\theta}{\in}$(0.5, 1]. On the other hand, when the channels are slightly orthogonal (${\theta}{\in}$(0, 0.5]), we observe some throughput degradation in the downlink. We have extended our analysis to the real downlink that has a nonsymmetric channel and an unequal power budget compared to the uplink. It is shown that the modified duality-based approach is thoroughly applied to the real downlink. Considering the complexity of the algorithms in [6] and [18], we conclude that these results are quite encouraging in terms of both performance and practical applicability of the generalized duality theorem.