• Title/Summary/Keyword: 동작 범위

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Breakdown Voltage and On-resistance Analysis of Partial-isolation LDMOS (Partial-isolation LDMOS의 항복전압과 온저항 분석)

  • Sin-Wook Kim;Myoung-jin Lee
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.567-572
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    • 2023
  • In this paper, the breakdown voltage of Pi-LDMOS (Partial isolation lateral double diffused metal oxide semiconductor) was analyzed by simulation. Breakdown voltage variation is investigated under various settings of Parial buied oxide(P-BOX) parameters(length, thickness, location) and their mechanism is specified. In addition, the change in on-resistance in the breakdown voltage and trade-off relationship was analyzed according to the change in the P-BOX parameter, and the Figure-of-merit(FOM) was calculated and compared. In proposed structure, Lbox=5 ㎛, tbox=2 ㎛, and Lbc=2 ㎛ showed the highest breakdown voltage of 138V, and Lbox=5 ㎛, tbox=1.6 ㎛, and Lbc=2 ㎛ showed the highest FOM. Compared to conventional LDMOS, the breakdown voltage is 123% and FOM is 3.89 times improved. Therefore, Pi-LDMOS has a high breakdown voltage and FOM, which can contribute to the improvement of the stable operating range of the Power IC.

System Analysis and Power Amplifier Design for ILS Localizer (ILS 로컬라이저 시스템 분석 및 전력증폭기 설계)

  • Su kyung Kim;Kyung Heon Koo
    • Journal of Advanced Navigation Technology
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    • v.28 no.1
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    • pp.116-122
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    • 2024
  • In this paper, course structure and course width were studied among the main performances of the system to derive the required performance of the modulation index, output power, and phase change specifications of the instrument landing system (ILS) localizer power amplifier. To satisfy the course structure's deviation standard (± 5 uA), the difference in depth of modulation (DDM) deviation standard of the carrier with sideband (CSB) amplifier was standardized to ± 1 uA(0.001 DDM). CSB 30 W power amplifier was designed, and through the modulation compensation circuit, sum in depth of modulation (SDM) is 40% ± 0.1% and DDM is ± 0.0005 DDM in the operating output range(45 dBm ~ 35 dBm). In addition, the course width and displacement sensitivity specifications were analyzed through simulation, and the ± 0.1° change applied during comissioning inspection, which is the most stringent standard, was applied. The output variation of the suppressed with sideband only ( SBO) amplifier was ± 2 mW or less, The phase was standardized to within ± 3 ° and the characteristics were satisfied. By applying a compensation circuit according to output power and temperature, stable modulation index, output, and phase characteristics were obtained.

Design of Isolation-Type Matching Network for Underwater Acoustic Piezoelectric Transducer Using Chebyshev Filter Function (체비셰프 필터함수를 이용한 수중 음향 압전 트랜스듀서의 절연형 정합회로 설계)

  • Lee, Jeong-Min;Lee, Byung-Hwa;Baek, Kwang-Ryul
    • The Journal of the Acoustical Society of Korea
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    • v.28 no.6
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    • pp.491-498
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    • 2009
  • This paper presents the design method of an impedance matching network using an isolation transformer and the Chebyshev filter function for the high efficiency and the flat power driving of an underwater acoustic piezoelectric transducer. The proposed impedance matching network is designed for minimizing the reactance component of transducer and having the flat power response in the wide frequency range. We design a low pass filter with ladder-type circuit using the Chebyshev function as standard prototype filter function. In addition, we design the impedance matching network which is suitable for the equivalent circuit of transducer and the turn ratio of transformer through the bandpass frequency transformation. The proposed method is applied to the simulated dummy load of the tonpilz-type transducer operating in the middle frequency range. The simulation results are compared with the measured characteristics and the validity of the proposed method is verified.

Relationships between Dietary Variety and Activities of Daily Life in Elderly People Living in Rural Areas of Chungnam Province (충남 일부 농촌지역 노인들의 식품섭취 다양성과 일상생활기능과의 관련성)

  • Chi, Kyung-Hee;Cho, Young-Chae
    • Journal of agricultural medicine and community health
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    • v.30 no.1
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    • pp.75-88
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    • 2005
  • Objectives: This survey was intended to provide basic data which can be available as a baseline in the set up of dietary guidelines for assuring community-based self-support of the rural elderly, through investigation of the relationship of the various dietary consumptions with their ADL and IADL. Methods: The study subjects, 439 rural residents(male: 196, female:243) aged over 65 in Kumsan Kun and Chongyang Kun, Chungchongnamdo Province were interviewed, in June of 2004, about their sociodemographic characteristics, daily life styles, the variety of dietary consumption, ADL and IADL with the following major findings: Results: In terms of the scores' distribution to show variety of food consumption among all subjects, 68.3% got 1~3 points, 23.2% 4~6 points, and 8.4% 7~10 points with a decreasing proportion of subjects in higher points. In terms of their functional status, normal-range groups showed 93.2% of ADL and 72.9% of IADL whereas, impaired ADL group 6.8% of ADL and 27.1% of IADL, respectively. Concerning the relation of ADL and IADL with the variety of their consumed food, the greater scores for food variety was associated with the significantly higher proportion of normal ADL group and the lower proportion of impaired ADL group. Multiple logistic regression analysis with ADL and IADL as dependent variables, and food variety scores as explanatory variables, the relative risk of impaired-ADL group was 0.84 in the food variety group of 4~6 points, 0.63 in 7~10 points with no statistical significance. The relative risk of impaired- IADL group was 0.52(p<0.01) in the food variety group of 4~6 points, 0.41(p<0.05) in 7~10 points with statistical significance. Conclusions: These study results suggest that the lower dietary variety, the lower functional capacity of daily living, and the variety of dietary is associated with the functional capacity of daily living in rural elderly.

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Development of control system for complex microbial incubator (복합 미생물 배양기의 제어시스템 개발)

  • Hong-Jik Kim;Won-Bog Lee;Seung-Ho Lee
    • Journal of IKEEE
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    • v.27 no.1
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    • pp.122-126
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    • 2023
  • In this paper, a control system for a complex microbial incubator was proposed. The proposed control system consists of a control unit, a communication unit, a power supply unit, and a control system of the complex microbial incubator. The controller of the complex microbial incubator is designed and manufactured to convert analog signals and digital signals, and control signals of sensors such as displays using LCD panels, water level sensors, temperature sensors, and pH concentration sensors. The water level sensor used is designed and manufactured to enable accurate water level measurement by using the IR laser method with excellent linearity in order to solve the problem that existing water level sensors are difficult to measure due to foreign substances such as bubbles. The temperature sensor is designed and used so that it has high accuracy and no cumulative resistance error by measuring using the thermal resistance principle. The communication unit consists of two LAN ports and one RS-232 port, and is designed and manufactured to transmit signals such as LCD panel, PCT panel, and load cell controller used in the complex microbial incubator to the control unit. The power supply unit is designed and manufactured to supply power by configuring it with three voltage supply terminals such as 24V, 12V and 5V so that the control unit and communication unit can operate smoothly. The control system of the complex microbial incubator uses PLC to control sensor values such as pH concentration sensor, temperature sensor, and water level sensor, and the operation of circulation pump, circulation valve, rotary pump, and inverter load cell used for cultivation. In order to evaluate the performance of the control system of the proposed complex microbial incubator, the result of the experiment conducted by the accredited certification body showed that the range of water level measurement sensitivity was -0.41mm~1.59mm, and the range of change in water temperature was ±0.41℃, which is currently commercially available. It was confirmed that the product operates with better performance than the performance of the products. Therefore, the effectiveness of the control system of the complex microbial incubator proposed in this paper was demonstrated.

Reflector Based Mobile Satellite Antenna with Novel Beam Steering Scheme (새로운 빔 조향 방식을 갖는 반사판 기반의 이동형 위성 통신 안테나)

  • Jung, Young-Bae;Eom, Soon-Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.4
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    • pp.344-350
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    • 2009
  • This paper proposes a hybrid antenna with novel beam steering scheme. The antenna have a cassegrain structure composed of two reflectors. The main reflector is designed for high gain performance using parabola curvature, and the sub-reflector is plate and can be rotated by ${\pm}3^{\circ}$. Thus proposed antenna can steer a antenna beam using the inclination of sub-reflector. A feed array composed of 20 elements is adapted as a feeder for electrical beam steering, and the antenna can be possible to steer the beam by the feed array with sub-reflector. Proposed antenna was fabricated to be operated in Ka-band(30.085$\sim$30.885 GHz) for TX and K-band(20.355$\sim$21.155 GHz), which are the operation frequencies of the Korean satellite, Mugunhwa, to provide satellite multi-media service to vehicles. By the performance test, it can be known that the antenna has minimum gain of 47 dBi for TX and 44.4 dBi for TX and can steer the beam by ${\pm}2^{\circ}$ with sub-reflector.

Highly Linear Wideband LNA Design Using Inductive Shunt Feedback (Inductive Shunt 피드백을 이용한 고선형성 광대역 저잡음 증폭기)

  • Jeonng, Nam Hwi;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1055-1063
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    • 2013
  • Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

Design and Implementation of a Bluetooth Baseband Module with DMA Interface (DMA 인터페이스를 갖는 블루투스 기저대역 모듈의 설계 및 구현)

  • Cheon, Ik-Jae;O, Jong-Hwan;Im, Ji-Suk;Kim, Bo-Gwan;Park, In-Cheol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.3
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    • pp.98-109
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    • 2002
  • Bluetooth technology is a publicly available specification proposed for Radio Frequency (RF) communication for short-range :1nd point-to-multipoint voice and data transfer. It operates in the 2.4㎓ ISM(Industrial, Scientific and Medical) band and offers the potential for low-cost, broadband wireless access for various mobile and portable devices at range of about 10 meters. In this paper, we describe the structure and the test results of the bluetooth baseband module with direct memory access method we have developed. This module consists of three blocks; link controller, UART interface, and audio CODEC. This module has a bus interface for data communication between this module and main processor and a RF interface for the transmission of bit-stream between this module and RF module. The bus interface includes DMA interface. Compared with the link controller with FIFOs, The module with DMA has a wide difference in size of module and speed of data processing. The small size module supplies lorr cost and various applications. In addition, this supports a firmware upgrade capability through UART. An FPGA and an ASIC implementation of this module, designed as soft If, are tested for file and bit-stream transfers between PCs.

Design of a Inverter-Based 3rd Order ΔΣ Modulator Using 1.5bit Comparators (1.5비트 비교기를 이용한 인버터 기반 3차 델타-시그마 변조기)

  • Choi, Jeong Hoon;Seong, Jae Hyeon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.7
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    • pp.39-46
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    • 2016
  • This paper describes the third order feedforward delta-sigma modulator with inverter-based integrators and a 1.5bit comparator for the application of audio signal processing. The proposed 3rd-order delta-sigma modulator is multi-bit structure using 1.5 bit comparator instead of operational amplifier. This delta-sigma modulator has high SNR compared with single-bit 4th-order delta-sigma modulator in a low OSR. And it minimizes power consumes and simplified circuit structure using inverter-based integrator and using inverter-based integrator as analogue adder. The modulator was designed with 0.18um CMOS standard process and total chip area is $0.36mm^2$. The measured power cosumption is 28.8uW in a 0.8V analog supply and 66.6uW in a 1.8V digital supply. The measurement result shows that the peak SNDR of 80.7 dB, the ENOB of 13.1bit and the dynamic range of 86.1 dB with an input signal frequency of 2.5kHz, a sampling frequency of 2.56MHz and an oversampling rate of 64. The FOM (Walden) from the measurement result is 269 fJ/step, FOM (Schreier) was calculated as 169.3 dB.

Design of Hardwired Variable Length Decoder for H.264/AVC (하드웨어 구조의 H.264/AVC 가변길이 복호기 설계)

  • Yu, Yong-Hoon;Lee, Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.11
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    • pp.71-76
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    • 2008
  • H.264(or MPEG-4/AVC pt.10) is a high performance video coding standard, and is widely used. Variable length code (VLC) of the H.264 standard compresses data using the statistical distribution of values. A decoder parses the compressed bit stream and searches decoded values in lookup tables, and the decoding process is not easy to implement by hardware. We propose an architecture of variable length decoder(VLD) for the H.264 baseline profile(BP) L4. The CAVLD decodes syntax elements using the combination of arithmetic units and lookup tables for the optimized hardware architecture. A barral shifter and a first 1's detector parse NAL bit stream, and are shared by Exp-Golomb decoder and CAVLD. A FIFO memory between CAVLD and the reorder unit and a buffer at the output of the reorder unit eliminate the bottleneck of data stream. The proposed VLD is designed using Verilog-HDL and is implemented using an FPGA. The synthesis result using a 0.18um standard CMOS technology shows that the gate count is 22,604 and the decoder can process HD($1920{\times}1080$) video at 120MHz.