• Journal of the Institute of Convergence Signal Processing
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• v.7 no.4
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• pp.207-213
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• 2006

This paper presents the design and implementation of a video processor for the device of need TV-OUT function. The designed video processor satisfies the standard conditions of ITU-R(International Telecommunication Union-Radiocommunication) BT.470. Also, in order to apply various digital device, we concentrate upon hardware complexity. ITU-R BT.470 can be classified as NTSC, PAL or SECAM. NTSC and PAL use QAM(Quardarature Amplitude Modulation) to transmit color difference signals and SECAM uses FM(Frequency Modulation). FM must have antic-cloche filter but filter recommended by ITU-R BT.470 is not easy to design due to sharpness of the frequency response. So this paper proposes that the special quality of anti-cloche filter is transformed easy to design and the modulation method is modified to be identical with the result required at standard. The processor can control power consumption by output mode to apply portable digital devices. The proposed processor is experimentally demonstrated with ALTERA FPGA APEX20KE EP20K1000EBC652-3 device and SAMSUNG LCD-TV.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.1
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• pp.8-11
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• 2019

In this paper, a Ku-band 50-W internally-matched power amplifier is designed and fabricated using a CGHV1J070D GaN HEMT from Wolfspeed. To obtain the same magnitudes and phases for the output signals of the unit transistor cells, which constitute a power transistor, a slit pattern and an asymmetric T-junction are used in the input and output matching circuits. The internally-matched power amplifier is fabricated on two different thin-film substrates with relative dielectric constants of 40 and 9.8, respectively, and is measured under pulsed conditions with a pulse period of $330{\mu}s$ and a duty cycle of 6%. The measured results show a maximum output power of 50~73 W, a drain efficiency of 35.4~46.4%, and a power gain of 4.5~6.5 dB from 16.2 to 16.8 GHz.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.4
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• pp.715-722
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• 2019

This paper introduces the implementation of an user-aware system using a visible light communication and its operations. The user-aware system using a visible light communication consists of the transmitter based on the Android system and the receiver based on an open-source controller. In the transmitter, user's personal information data is encoded and converted to visible light signals by the Android camera interface. In the receiver, the photodiode module receives the incoming visible light signals and converts to electrical signals and the open-source controller, that is arduino processes the received data. The processing module finds the start bit of 0111 to determine the user information data from the packet for the burst-mode communication. According to the experimental results, the proposed system successfully transmits and receives visible light data with the manchester encoding.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.436-438
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• 2019

Air hockey robots are machine vision systems that allow users to play hockey balls through the camera. The position detection of the hockey ball is realized by using the color information of the ball using OpenCV library. It senses the position of the hockey ball, predicts its trajectory, and sends the result to the ARM Cortex-M board. The ARM Cortex-M board controls a 2- Axis Cartesian Coordinate Robot to run an air hockey game. Depending on the strategy of the air hockey robot, it can operate in defensive, offensive, defensive and offensive mode. In this paper, we describe a vision system development and trajectory prediction system and propose a new method to control a biaxial orthogonal robot in an air hockey game.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.251-253
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• 2019

This paper describes an implementation of a security SoC (System-on-Chip) prototype that interfaces a microprocessor with a block cipher crypto-core. The Cortex-M0 was used as a microprocessor, and a crypto-core implemented by integrating ARIA and AES into a single hardware was used as an intellectual property (IP). The integrated ARIA-AES crypto-core supports five modes of operation including ECB, CBC, CFB, CTR and OFB, and two master key sizes of 128-bit and 256-bit. The integrated ARIA-AES crypto-core was interfaced to work with the AHB-light bus protocol of Cortex-M0, and the crypto-core IP was expected to operate at clock frequencies up to 50 MHz. The security SoC prototype was verified by BFM simulation, and then hardware-software co-verification was carried out with FPGA implementation.

• The Journal of the Korea institute of electronic communication sciences
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• v.19 no.4
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• pp.677-684
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• 2024

In this paper, the design method of a step-up DC-DC converter based on PWM control was studied for solar power system application. The operating principle of the switching mode step-up type DC-DC converter was analyzed and the basic design method was studied. For photovoltaic system application, an output voltage feedback control algorithm based on PWM control was developed to enable the converter's output voltage to follow the target voltage under variable input conditions. As a procedure to verify the effectiveness of the proposed algorithm, a prototype of a step-up DC-DC converter with a single feedback output voltage was designed and made by boosting the input voltage DC 10V to DC 30V. In experiments with prototypes, it was confirmed that the output voltage of the oscilloscope and LCD accurately followed the target output voltage. In the performance evaluation test, it was confirmed that the output voltage of the oscilloscope and LCD accurately followed the target output voltage by showing an error rate within 1 [%] of the reference voltage.

• Journal of Korean Tunnelling and Underground Space Association
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• v.24 no.6
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• pp.451-464
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• 2022

The high-level nuclear waste repository is a deep geological disposal system exposed to complex environmental conditions such as high temperature, radiation, and ground-water due to handling spent nuclear fuel. Continuous exposure can lead to cracking and deterioration of the structure over time. On the other hand, the high-level nuclear waste repository requires an ultra-long life expectancy. Thus long-term structural health monitoring is essential. Various sensors such as an accelerometer, earth pressure gauge, and displacement meter can be used to monitor the health of a structure, and a piezoelectric sensor is generally used. Therefore, it is necessary to develop a highly durable sensor based on the durability assessment of the piezoelectric sensor. This study designed an accelerated life test for durability assessment and life prediction of the piezoelectric sensor. Based on the literature review, the number of accelerated stress levels for a single stress factor, and the number of samples for each level were selected. The failure mode and mechanism of the piezoelectric sensor that can occur in the environmental conditions of the high-level waste repository were analyzed. In addition, two methods were proposed to investigate the maximum harsh condition for the temperature stress factor. The reliable operating limit of the piezoelectric sensor was derived, and a reasonable accelerated stress level was set for the accelerated life test. The suggested methods contain economical and practical ideas and can be widely used in designing accelerated life tests of piezoelectric sensors.

• Korean Journal of Optics and Photonics
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• v.24 no.1
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• pp.1-8
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• 2013

In this paper, we report design, fabrication and characterization of the WBRM (Wide Band Receiver Module) for LADAR (LAser Detection And Ranging) application. The WBRM has been designed and fabricated using self-made APD (Avalanche Photodiode) and TIA (Trans-impedance Amplifier). The APD and TIA chips have been integrated on 12-pin TO8 header using self-made ceramic submount and circuit. The WBRM module showed 450 ps of rise time, and corresponding 780 MHz bandwidth. Furthermore, it showed very low output noise less than 0.8 mV, and higher SNR than 15 for 150 nW of MDS(Minimum Detectable Signal). To the author's knowledge, this is the best performance of an optical receiver module for LIDAR fabricated by 200 um InGaAs APD.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.2
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• pp.79-84
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• 2016

A flexible electronic device deformed by external force causes the failure of a semiconductor die. Even without failure, the repeated elastic deformation changes carrier mobility in the channel and increases resistivity in the interconnection, which causes malfunction of the integrated circuits. Therefore it is desirable that a semiconductor die be placed on a neutral line where the mechanical stress is zero. In the present study, we investigated the effects of design factors on the position of neutral line by finite element analysis (FEA), and expected the possible failure behavior in a flexible face-down packaging system assuming flip-chip bonding of a silicon die. The thickness and material of the flexible substrate and the thickness of a silicon die were considered as design factors. The thickness of a flexible substrate was the most important factor for controlling the position of the neutral line. A three-dimensional FEA result showed that the von Mises stress higher than yield stress would be applied to copper bumps between a silicon die and a flexible substrate. Finally, we suggested a designing strategy for reducing the stress of a silicon die and copper bumps of a flexible face-down packaging system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.19-27
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• 2007

This paper presents power supply-insensitive Gbps low power LVDS I/O circuits. The proposed LVDS I/O has been designed and simulated using 1.8V, $0.18\;{\mu}m$ TSMC CMOS Process. The LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and an output stage with the switched capacitor common mode feedback(SC-CMFB). The differential phase splitter generates a pair of differential signals which provides a balanced duty $cycle(50{\pm}2%)$ and phase difference$(180{\pm}0.2^{\circ})$ over a wide supply voltage range. Also, $V_{OD}$ voltage is 250 mV which is the smallest value of the permissible $V_{OD}$ range for low power operation. The output buffer maintains the required $V_{CM}$ within the permissible range$(1.2{\pm}0.1V)$ due to the SC-CMFB. The receiver covers a wide input DC offset $range(0.2{\sim}2.6\;V)$ with 38 mV hysteresis and Produces a rail-to-rail output over a wide supply voltage range. Beside, the designed receiver has 38.9 dB gain at 1 GHz, which is higher than conventional receivers.