• Title/Summary/Keyword: 동작모드

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The Analysis of Operation Mode of Three-Phase Flux-Lock Type Superconducting Fault Currents Limiter (삼상 자속구속형 한류기의 동작모드분석)

  • Hwang, Jong-Sun;Choi, Hyo-Sang;Park, Hyoung-Min;Cho, Youn-Sun;Lee, Na-Young;Nam, Gueng-Hyun;Han, Tea-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.05a
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    • pp.46-48
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    • 2006
  • We investigated the analysis of operation mode of three-phase flux-lake type superconducting fault current limiter(SFCL). The structure of the integrated three-phase flux-lock type SFCL consisted of three-phase flux-lock reactor wound on an iron core with the same turn between coil 1 and coil 2 in each phase. When the SFCL is operated under the normal condition, the flux generated in the iron core is zero because the flux generated between two coils of each single phase is canceled out. Therefore, the SFCL's impedance is zero and the SFCL has negligible influence on the power system, However, if a fault occurs in any single-phase among three phases, the flux generated in the iron core is not zero any more. The flux makes elements of all phase-quench irrespective of the fault type, which reduces the current of fault phase as well as the current of sound phase.

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Design and Fabrication of X-Band 50 W Pulsed SSPA Using Pulse Modulation and Power Supply Switching Method (펄스 변조 및 전원 스위칭 방법을 혼용한 X-대역 50 W Pulsed SSPA 설계 및 제작)

  • Kim, Hyo-Jong;Yoon, Myoung-Han;Chang, Pil-Sik;Kim, Wan-Sik;Lee, Jong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.4
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    • pp.440-446
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    • 2011
  • In this paper, a X-band 50 W pulsed solid state power amplifier(SSPA) is designed and fabricated for radar systems. The SSPA consists of a driver amplifier, a high power amplifier, and a pulse modulator. The high power stage employes four 25 W GaAs FET to deliver 50 W at X-band. To meet the stringent target specification for the SSPA, we used a new hybrid pulse switching method, which combine the advantage of pulse modulation and bias switching method. The fabricated SSPA shows a power gain of 44.2 dB, an output power of 50 W over a 1.12 GHz bandwidth. Also, pulse droop < 1 dB meet the design goals and a rise/fall time is less than 12.45 ns. Fabricated X-band pulsed SSPA size is compact with overall size of $150{\times}105{\times}30\;mm^3$.

Near Infrared Laser Based on Polymer Waveguide Bragg Grating (폴리머 광도파로 브래그 격자 기반의 근적외선 레이저)

  • Kim, Kyung-Jo;Son, Nam-Seon;Kim, Jun-Whee;Oh, Min-Cheol
    • Korean Journal of Optics and Photonics
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    • v.22 no.4
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    • pp.179-183
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    • 2011
  • An external cavity laser operating at near infrared wavelength is demonstrated by incorporating polymer waveguide Bragg reflectors. 3rd order Bragg grating and oversized rip waveguide structure were designed by using the effective index method and the transmission matrix method. The polymer waveguide was fabricated using polymer materials with refractive indices of 1.462 and 1.435 for the core and the cladding layers, respectively. The external feedback laser with 875-nm Bragg grating exhibits single mode lasing located at 850-nm wavelength with an output power of 0 dBm, a 20-dB bandwidth of 0.2 nm and a side mode suppression ratio of 40 dB.

Delta Sigma Modulation of Controller Input Signal for the LED Light Driver (시그마 델타 변조에 의한 LED 드라이버의 입력 콘트롤러 설계)

  • Um, Kee-Hong
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.2
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    • pp.151-155
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    • 2016
  • In this paper, we present the LED dimming control system by using ADPCM (Adaptive Differential Pulse Code Modulation). This ADPCM apparatus accurately controls the LED current with high resolution reducing the RFI (radio frequency interference) due to the spreading out of the harmonics of current of pulses. Additionally, this makes it easier to increase the accuracy of control operation. This study introduces to make a digitally controlled circuit for controlling LED with high-energy efficient by adopting pulse current to LED. The LED current drive system we designed are two systems, the digitally-controlled unit and analog switching mode power supply unit, can be developed separately. The simulation shows the sigma delta modulation of digital to analog converter's output when the input level is 0.7. From this simulation, the output is approached to accurately 0.15% to target value with 510 pulses.

Implement of Finger-Gesture Remote Controller using the Moving Direction Recognition of Single (단일 형상의 이동 방향 인식에 의한 손 동작 리모트 컨트롤러 구현)

  • Jang, Myeong-Soo;Lee, Woo-Beom
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.13 no.4
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    • pp.91-97
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    • 2013
  • A finger-gesture remote controller using the single camera is implemented in this paper, which is base on the recognition of finger number and finger moving direction. Proposed method uses the transformed YCbCr color-difference information to extract the hand region effectively. The number and position of finger are computer by using a double circle tracing method. Specially, a user continuous-command can be performed repeatedly by recognizing the finger-gesture direction of single shape. The position information of finger enables a user command to amplify a same command in the User eXperience. Also, all processing tasks are implemented by using the Intel OpenCV library and C++ language. In order to evaluate the performance of the our proposed method, after applying to the commercial video player software as a remote controller. As a result, the proposed method showed the average 89% recognition ratio by the user command-mode.

Test Pattern Generation for Asynchronous Sequential Circuits Operating in Fundamental Mode (기본 모드에서 동작하는 비동기 순차 회로의 시험 벡터 생성)

  • 조경연;이재훈;민형복
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.9
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    • pp.38-48
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    • 1998
  • Generating test patterns for asynchronous sequential circuits remains to be a very difficult problem. There are few algorithms for this problem, and previous works cut feedback loops, and insert synchronous flip-flops in the feedback loops during ATPG. The conventional algorithms are similar to the algorithms for synchronous sequential circuits. This means that the conventional algorithms generate test patterns by modeling asynchronous sequential circuits as synchronous sequential circuits. So, test patterns generated by those algorithms nay not detect target faults when the test patterns are applied to the asynchronous sequential circuit under test. In this paper an algorithm is presented to generate test patterns for asynchronous sequential circuits. Test patterns generated by the algorithm can detect target faults for asynchronous sequential circuits with the minimal possibility of critical race problem and oscillation. And it is guaranteed that the test patterns generated by the algorithm will detect target faults.

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Design of Hysteretic Buck Converter with A Low Output Ripple Voltage and Fixed Switching Frequency in CCM (작은 출력 전압 리플과 연속 전도모드에서 고정된 스위칭 주파수를 가지는 히스테리틱 벅 변환기 설계)

  • Jeong, Tae-Jin;Jo, Yong-Min;Lee, Tae-Heon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.6
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    • pp.50-56
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    • 2015
  • An efficient fast response hysteretic buck converter suitable for mobile application is propoesed. The problems of large output ripple and difficulty in using of small power inductor that conventional hysteretic converter has are improved by adding ramp generator. and the changeable switching frequency with load current is fixed by adding a delay time control circuit composed of PLL structure resulting in decrease of EMI noise. The circuits are implemented by using BCDMOS 0.35um 2-polt 4-metal process. Measurement results show that the converter operates with a switching frequency of 1.85MHz when drives 80mA load current. As the converter drives over 170mA load current, the switching frequency is fixed on 2MHz. The converter has output ripple voltage of less 20mV and more than efficiency 85% with 50~500mA laod current condition.

A Parallel Equalization Algorithm with Weighted Updating by Two Error Estimation Functions (두 오차 추정 함수에 의해 가중 갱신되는 병렬 등화 알고리즘)

  • Oh, Kil-Nam
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.7
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    • pp.32-38
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    • 2012
  • In this paper, to eliminate intersymbol interference of the received signal due to multipath propagation, a parallel equalization algorithm using two error estimation functions is proposed. In the proposed algorithm, multilevel two-dimensional signals are considered as equivalent binary signals, then error signals are estimated using the sigmoid nonlinearity effective at the initial phase equalization and threshold nonlinearity with high steady-state performance. The two errors are scaled by a weight depending on the relative accuracy of the two error estimations, then two filters are updated differentially. As a result, the combined output of two filters was to be the optimum value, fast convergence at initial stage of equalization and low steady-state error level were achieved at the same time thanks to the combining effect of two operation modes smoothly. Usefulness of the proposed algorithm was verified and compared with the conventional method through computer simulations.

A Reconfigurable Analog Front-end Integrated Circuit for Medical Ultrasound Imaging Systems (초음파 의료 영상 시스템을 위한 재구성 가능한 아날로그 집적회로)

  • Cha, Hyouk-Kyu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.12
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    • pp.66-71
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    • 2014
  • This paper presents an analog front-end integrated circuit (IC) for medical ultrasound imaging systems using standard $0.18-{\mu}m$ CMOS process. The proposed front-end circuit includes the transmit part which consists of 15-V high-voltage pulser operating at 2.6 MHz, and the receive part which consists of switch and a low-power low-noise preamplifier. Depending on the operation mode, the output driver in the transmit pulser can be reconfigured as the switch in the receive path and thus the area of the overall front-end IC is reduced by over 70% in comparison to previous work. The designed single-channel front-end prototype consumes less than $0.045mm^2$ of core area and can be utilized as a key building block in highly-integrated multi-array ultrasound medical imaging systems.

Development of A Electromagnetic Exposure System for In Vitro Experiments at PCS Band (PCS 대역 세포실험용 전자파 노출 장치 개발)

  • Part Min-Young;Ko Chae-Ok;Sung Mi-Jin;Kim Jeong-Lan;Pack Jeong-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.4 s.107
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    • pp.335-340
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    • 2006
  • In this paper, a rectangular-cavity-type exposure system for in vitro experiments has been developed fur the biological effect studies of radio frequency fields from handhold wireless telephones. It ia fed with a ${\lambda}_g/8$ monopole antennas at the ${\lambda}_g/4$ position of the top plate in order to excite fundamental $TE_{102}$ mode and it allows the uniform exposure of one 8.5 cm(inner diameter) petri dish. SARs inside the exposed medium have been characterized by numerical simulations, using the FDTD method and by experimental dosimetry with fiberoptic temperature probes (model 790, Luxtron Corp.).