• Journal of the Korean Crystal Growth and Crystal Technology
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• v.28 no.3
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• pp.99-105
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• 2018

In order to avoid un-uniform crystallization on the surface of a quartz glass crucible that is known to affect the production yield of the single crystal silicon, Ba (barium) was selected as a crystallization promotor and the inner surface of the crucible was coated using Ba (barium hydroxide octahydrate)-solution by the spray pyrolysis method. For un-coated crucible, it was found that the crystallization of its surface started at $1350^{\circ}C$, and at $1450^{\circ}C$ the surface was uniformly crystallized with ${\beta}$-cristobalite phase. It was found that the crucible coated with Ba began to be crystallized from $1000^{\circ}C$ and was uniformly crystallized on the crucible surface at $1300^{\circ}C$. In this case, ${\alpha}$-cristobalite and needle-shaped $BaSi_2O_5$ phase were created and disappeared as a crystal phase, and the ${\beta}$-cristobalite phase was eventually evenly distributed over the Ba-coated crucible surface.

• Korean Journal of Materials Research
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• v.11 no.7
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• pp.556-561
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• 2001

We prepared a new a SOS(silicon-on-silicide) wafer pair which is consisted of Si(100)/1000$\AA$-NiSi Si (100) layers. SOS can be employed in MEMS(micro- electronic-mechanical system) application due to low resistance of the NiSi layer. A thermally evaporated $1000\AA$-thick Ni/Si wafer and a clean Si wafer were pre-mated in the class 100 clean room, then annealed at $300~900^{\circ}C$ for 15hrs to induce silicidation reaction. SOS wafer pairs were investigated by a IR camera to measure bonded area and probed by a SEM(scanning electron microscope) and TEM(transmission electron microscope) to observe cross-sectional view of Si/NiSi. IR camera observation showed that the annealed SOS wafer pairs have over 52% bonded area in all temperature region except silicidation phase transition temperature. By probing cross-sectional view with SEM of magnification of 30,000, we found that $1000\AA$-thick uniform NiSi layer was formed at the center area of bonded wafers without void defects. However we observed debonded area at the edge area of wafers. Through TEM observation, we found that $10-20\AA$ thick amourphous layer formed between Si surface and NiSix near the counter part of SOS. This layer may be an oxide layer and lead to degradation of bonding. At the edge area of wafers, that amorphous layer was formed even to thickness of $1500\AA$ during annealing. Therefore, to increase bonding area of Si NiSi ∥ Si wafer pairs, we may lessen the amorphous layers.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.23-29
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• 2013

Development of flexible electronic devices has primarily focused on printing technology using organic materials. However, organic-based flexible electronics have several disadvantages, including low electrical performance and long-term reliability. Therefore, we fabricated nano- and micro-thick silicon film attached to the polymer substrate using transfer printing technology to investigate the feasibility of silicon-based flexible electronic devices with high performance and high flexibility. Flexibility of the fabricated samples was investigated using bending and stretching tests. The failure bending radius of the 200 nm-thick silicon film attached on a PI substrate was 4.5 mm, and the failure stretching strain was 1.8%. The failure bending radius of the micro-thick silicon film attached on a FPCB was 2 mm, and the failure strain was 3.5%, which showed superior flexibility compared with conventional silicon material. Improved flexibility was attributed to a buffering effect of the adhesive between the silicon film and the substrate. The superior flexibility of the thin silicon film demonstrates the possibility for flexible electronic devices with high performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.116-117
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• 2006

We investigated selective emitter effect of Porous Silicon (PSI) as antireflection coatings (ARC). The thin PSi layer, less than 100nm, was electrochemically formed by electrochemical method in about $3{\mu}m$ thick $n^+$ emitter on single crystalline silicon wafer (sc-Si). The appropriate PSi formations for selective emitter effect were carried out a two steps. A first set of samples allowed to be etched after metal-contact processing and a second one to evaporate Ag front-side metallization on PSi layer, by evaluating the I-V features The PSi has reflectance less than 20% in wavelength for 450-1000nm and porosity is about 60%. The cell made after front-contact has improved cell efficiency of about in comparison with the one made after PSi. The observed increase of efficiency for samples with PSi coating could be explained not only by the reduction of the reflection loss and surface recombination but also by the increased short-circuit current (Isc) within selective emitter. The assumption was confirmed by numerical modeling. The obtained results point out that it would be possible to prepare a solar cell over 15% efficiency by the proposed simple technology.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.10
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• pp.113-123
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• 1990

Tungsten film was deposited on the single crystal silicon wafer in a low pressure chemical vapor deposition reactor from silane and tungsten hexafluoride in the temperature range of $250-400^{\circ}C$ Deposition rate was found to be determined by the mass transfer rate of reactants from the gas phase to the safter surface. It was found out that tungsten films deposited contained about 3 atomic $\%$ of silicon and that the crystallinity and the grain size increased as the deposition temperature was increased. The resistivity of the film was measured to be in the range of $7~25{\mu}{\Omega}-cm$ and decreased with increasing deposition temperature. The adhesion of the tungsten film on a silicon surface was measured by the tape peel off test and it was improved with increasing deposition temperature. From the analysis of the gas composition, the reaction pathway to form $SiF_{4}$ and $H_{2}$ was found to be more favorable than HF formation.

• Korean Journal of Materials Research
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• v.1 no.1
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• pp.17-22
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• 1991

Tantalum thin films were deposited by DC sputtering on heavily doped single Si substrates. These substrates were treated by means of a rapid thermal annealing (RTA) under Ar atmosphere for various temperatures($600-1100^{\circ}C$). The silicide formation and the impurities behavior in the substrate are studied by means of XRD, SEM, four-point probe, HP4145, and SIMS. The formation of $TaSi_2$ started at $800^{\circ}C$ for all kinds of impurities and the entire Tantalum thin metal films were transformed into $TaSi_2$ above $1000^{\circ}C$ Also the contact resistance for $TaSi_2/P^+$ region had a low value; $22{\Omega}$, at contact site of $0.9{\times}0.9(\mu\textrm{m^2}$), and implanted impurities were diffused out into the $TaSi_2$ for rapid thermal annealing.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.113-113
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• 2018

환경 친화형 전기자동차, 하이브리드 자동차, 전철 등에서는 고내압 및 소형으로 전력손실을 감소시킬 수 있는 파워 디바이스가 필수이다. 최근, 실리콘 카바이드(SiC, silcon carbide)는 기존 실리콘(Si)보다 스위칭 손실의 저감 및 고온환경에서의 동작 특성이 우수하여, 차세대 저 손실 전력반도체 재료로서 기대를 받고 있다. 용액 성장 법에서 고품질 SiC 결정을 만들 수 있다. 그러나 늦은 성장 속도 때문에 SiC의 양산을 어렵게 하고 있다. 현재까지 성장 속도 향상을 위한 Si용매에 Cr을 첨가하여 탄소 용해도를 높이는 방법이 사용되고 안정된 성장을 위한 Si-Cr용매에 Al를 첨가하는 등 다양한 금속을 첨가하는 방법이 이용되고 있다. 선행 연구에서는 다양한 용매인 탄소 용해도를 실측하고 특히 큰 탄소 용해도를 보인 것은 Co이었다. 본 연구에서는 $Si_{0.6}Cr_{0.4}$원료와 Co를 첨가한 $Si_{0.56}Cr_{0.4}Co_{0.04}$의 용매에 의한 SiC용액 성장을 실시하고 결정 성장 속도 및 표면 상태의 변화를 검토했다. on-axis 4H-SiC(000-1)을 사용한 Top-seeded solution growth(TSSG)법과 원자 비율로 $Si_{0.6}Cr_{0.4}$와 $Si_{0.56}Cr_{0.4}Co_{0.04}$의 용매를 이용하여 SiC 용액 성장을 실시했다. Ar가스에서 저항 가열로 내를 치환 후에 $1800^{\circ}C$까지 가열하고 종자화 후에 120분간 유지하고 결정 성장을 실시했다. 냉각 후에 성장의 표면에 남은 용매를 $HF+HNO_3$에서 제거했다. 광학 현미경을 이용하여 결정면과 두께를 관찰 측정했다. Co를 첨가한 $Si_{0.56}Cr_{0.4}Co_{0.04}$의 경우는 $Si_{0.6}Cr_{0.4}$의 경우보다 결정 성장 속도가 향상됐다. 또한 $Si_{0.6}Cr_{0.4}$보다 step-flow의 성장을 나타낸 결정의 표면이 전반적으로 관찰됐으며 안정된 결정성장을 나타냈다. 본 연구에서 실시한 연구 방법과 결과는 고품질 및 고속의 SiC 용액성장을 위한 매우 유용한 자료로 활용 될 수 있을 것으로 판단한다.

• 한국태양에너지학회:학술대회논문집
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• 2011.04a
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• pp.105-110
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• 2011

The doping procedure in crystalline silicon solar cell fabrication usually contains oxygen injection during drive-in process and removal of phosphorous silicate glass(PSG). In this paper, we studied the effect of oxygen injection and PSG on conversion efficiency of solar cell. The mono crystalline silicon wafers with $156{\times}156mm^2$, $200{\mu}m$, $0.5-3.0{\Omega}{\cdot}cm$ and p-type were used. After etching $7{\mu}m$ of the surface to form the pyramidal structure, the P(phosphorous) was injected into silicon wafer using diffusion furnace to make the emitter layer. After then, the silicon nitride was deposited by the PECVD with 80 nm thickness and 2.1 refractive index. The silver and aluminium electrodes for front and back sheet, respectively, were formed by screen-printing method, followed by firing in 400-425-450-550-$880^{\circ}C$ five-zone temperature conditions to make the ohmic contact. Solar cells with four different types were fabricated with/without oxygen injection and PSG removal. Solar cell that injected oxygen during the drive-in process and removed PSG after doping process showed the 17.9 % conversion efficiency which is best in this study. This solar cells showed $35.5mA/cm^2$ of the current density, 632 mV of the open circuit voltage and 79.5 % of the fill factor.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.34-39
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• 2011

Screen printing method is a common way to fabricate the crystalline silicon solar cell with low-cost and high-efficiency. The screen printing metallization use silver paste and aluminum paste for front and rear contact, respectively. Especially the rear contact between aluminum and silicon is important to form the back surface filed (Al-BSF) after firing process. BSF plays an important role to reduces the surface recombination due to $p^+$ doping of back surface. However, Al electrode on back surface leads to bow occurring by differences in coefficient of thermal expansion of the aluminum and silicon. In this paper, we studied the properties of mono crystalline silicon solar cell for rear electrode with aluminum and aluminum-boron in order to characterize bow and BSF of each paste. The 156*156 $m^2$ p-type silicon wafers with $200{\mu}m$ thickness and 0.5-3 ${\Omega}\;cm$ resistivity were used after texturing, diffusion, and antireflection coating. The characteristics of solar cells was obtained by measuring vernier callipers, scanning electron microscope and light current-voltage. Solar cells with aluminum paste on the back surface were achieved with $V_{OC}$ = 0.618V, JSC = 35.49$mA/cm^2$, FF(Fill factor) = 78%, Efficiency = 17.13%.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.79-79
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• 2000

탄화규소는 그 전기적, 열적 기계적 안정성 때문에 새로운 반도체 재료로서 주목받고 있는 물질이다. 탄화규소를 이용하여 전자소자를 제조하기 위해서는 ohmic 접촉과 Schottky 접촉을 형성하는 전극물질의 개발이 선행되어야 하며, 고온, 고주파, 고출력용 반도체 소자를 제조하기 위해서는 전극의 고온 안정성 확보가 필수적이다. 따라서 탄화규소 소자의 응용범위는 전극에 의해서 제한된다고 할 수 있다. 일반적으로 전극을 증착한 후 원하는 접촉 특성을 얻기 위해서는 열처리 과정을 거쳐야 하며 접촉의 특성이 열처리에 의해 영향을 받는 것으로 알려져 있다. 따라서 본 연구에서는 열처리가 금속/탄화규소 접촉의 특성에 미치는 영향을 알아보고자 하였으며, 이를 바탕으로 우수한 Schottky 다이오드의 제작 가능성을 타진해보고자 하였다. 유기실리콘 화합물 원료인 TEMSM(bis-trimethysilylmethane)을 사용하여 실리콘 기판위에 단결정 $eta$-Sic 박막을 증착하였다. 기판의 영향을 줄이기 위하여 $\beta$-Sic 박막의 두께가 $1.5mu extrm{m}$ 이상인 시편을 사용하였다. 전극으로는 Pt를 사용하였으며, 전극 증착은 DC magnetron sputter를 이용하였다. 전기적인 특성을 분석하기 위하여 전류-전압, 커패시턴스-전압 특성을 분석하였고, XRD와 AES를 이용하여 계면에서의 반응을 알아보았다. Hall 측정 결과 모든 $\beta$-Sic 박막은 약 2$\times$1018cm-3 정도의 도핑 농도를 갖는 n형 탄화규소임을 확인하였다. Pt/$\beta$-Sic 접촉은 열처리 전에는 ohmic 접촉 특성을 보였으나 열처리 후에는 Schottky 접촉의 특성을 나타냈다. 전기적 특성 분석을 통하여 열처리 온도가 증가할수록 에너지 장벽의 높이가 증가하는 것을 알 수 있었다. 이상적인 Pt/$\beta$-Sic 접촉의 특성을 보이는 것은 전극 증착시 sputtering에 의하여 계면에 발생한 결함이 도너의 역할을 하여 에너지 장벽의 두께를 감소시켜 tunneling을 촉진하기 때문인 것으로 판단된다. 열처리 후 접촉 특성이 변화하는 것은 이러한 결함들의 소멸 때문으로 생각된다. AES 분석을 통하여 열처리시 Pt가 $\beta$-Sic 내부로 확산하는 것을 알 수 있었으며, 이 때 Pt가 $\beta$-Sic 와 반응하여 계면에 실리사이드가 형성됨으로써 Pt/$\beta$-Sic 계면이 보다 안정한 탄화규소 박막 내부로 이동하게 되고 계면의 결함 농도가 줄어드는 것이 접촉 특성 변화의 원인이라 할 수 있다. 열처리 온도가 증가함에 따라 계면이 점점 $\beta$-Sic 내부로 이동하여 결함농도가 낮아지기 때문에 tunneling 효과가 감소하여 에너지 장벽이 높아지게 된다. Pt를 ohmic 접촉과 Schottky 접촉 전극물질로 이용하여 제작한 Schottky 다이오드는 ohmic 접촉 형성시 Schottky 접촉에 발생하는 wputtering 손상에 의하여 좋은 정류특성을 얻지 못하였다. 따라서 chmic 접촉 전에 Schottky 접촉의 passivation이 필요한 것으로 판단된다.