• Title/Summary/Keyword: 다치 논리함수

Search Result 36, Processing Time 0.028 seconds

Variations and Series Expansions of the Symbolic Multiple-Valued Logic functions (기호 다치 논리함수와 그 변화 및 전개)

  • 이성우;정환묵
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.20 no.5
    • /
    • pp.1-7
    • /
    • 1983
  • Generally, multiple-valued logic algebra is based on the number system of modulo-M. In this paper, characters a, b, c‥… each of them represents the independent state, are regarded as the elements of the symbolic multiple-valued logic. By using the set theory, the symbolic multiple - valued logic and their functions are defined. And Varation for the symbolic logic function due to the variation of a variable and their properties are suggested and analized. With these variations, the MacLaurin's and Taylor's Series expansions of the symbolic logic functions are proposed and proved.

  • PDF

A Study on Constructing the Multiple-Valued Logic Systems over Finite Fields using by the Decision Diagram (결정도(決定圖)에 기초(基礎)한 유한체상(有限體上)의 다치논리(多値論理)시스템구성(構成)에 관한 연구(硏究))

  • Park, Chun-Myoung
    • Journal of IKEEE
    • /
    • v.3 no.2 s.5
    • /
    • pp.295-304
    • /
    • 1999
  • This paper presents a method of constructing the Multiple-Valued Logic Systems(MVLS) over Finite Fields(FF) using by Decision Diagram(DD) that is based on Graph Theory. The proposed method is as following. First, we derivate the Ordered Multiple-Valued Logic Decision Diagram(OMVLDD) based on the multiple-valued Shannon's expansion theorem and we execute function decomposition using by sub-graph. Next, we propose the variable selecting algorithm and simplification algorithm after apply the each isomorphism and reodering vertex. Also we propose MVLS design method.

  • PDF

A Study on the Realiation of Logical function by flexible Logical Cells (가변논리소자에 의한 논리함수의 실현에 관한 연구)

  • 임재탁
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.11 no.4
    • /
    • pp.1.1-11
    • /
    • 1974
  • A general and systematic method of organizing two-dimensional flexible cellular array which is capable of reclizing arbitrary combinational switching function is developed. A set of n functions of n variables is transformed to revalued functions of one variable. This set of functions form a semigroup under the normal operation which is defined in this paper. A systematic method of generating any functions using three base functions is presented. Three basic networks which are capable of realizing three base functions are designed using only one one-dimensional array. The algorithm is presented for lealizing arbitrary combinational switching functions by organizing this basic array in two.dimensional cellular array and by appropriately setting the parameters or the edge of the array.

  • PDF

(Implementation of Current-Mode CMOS Multiple-Valued Logic Circuits) (전류 모드 CMOS 다치 논리 회로의 구현)

  • Seong, Hyeon-Gyeong;Han, Yeong-Hwan;Sim, Jae-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.39 no.3
    • /
    • pp.191-200
    • /
    • 2002
  • In this paper, we present the method transforming the interval functions into the truncated difference functions for multi-variable multi-valued functions and implementing the truncated difference functions to the multiple valued logic circuits with uniform patterns using the current mirror circuits and the inhibit circuits by current-mode CMOS. Also, we apply the presented methods to the implementation of circuits for additive truth table of 2-variable 4-valued MOD(4) and multiplicative truth table of 2-variable 4-valued finite fields GF(4). These circuits are simulated under 2${\mu}{\textrm}{m}$ CMOS standard technology, 15$mutextrm{A}$ unit current, and 3.3V power supply voltage using PSpice. The simulation results have shown the satisfying current characteristics. Both implemented circuits using current-mode CMOS have the uniform Patterns and the regularity of interconnection. Also, it is expansible for the variables of multiple valued logic functions and are suitable for VLSI implementation.

A Context Aware Model and It's Application Using Difference of Multiple-Valued Logic Functions (다치 함수의 차분을 이용한 상황 인식 모델 및 응용)

  • Go, Hyeon-Jeong;Jeong, Hwan-Muk
    • Proceedings of the Korean Institute of Intelligent Systems Conference
    • /
    • 2006.11a
    • /
    • pp.215-219
    • /
    • 2006
  • 최근 유비쿼터스 컴퓨팅 환경에서 핵심적인 요소 기술인 상황인식 시스템을 실현하기 위해 이에 필요한 상황정보를 수집하는데 점차 센서의 활용과 응용분야가 확대되고 있다. 상황인식 서비스는 센서로부터 수집된 상황정보의 수집 및 교환을 통해 인식하고, 해석 및 추론 과정을 거쳐 사용자에게 상황에 적절한 서비스를 제공하는 것으로 매장, 의료, 교육 등의 응용분야에서 많이 연구되고 있다. 본 논문에서는 Boole 함수 및 다치 논리함수의 미분을 이용하여 유비쿼터스 환경 하에서 주변상황 등을 인식하는 방법과 그 인식 결과를 해석하고 주변상황의 변화에 따른 적절한 서비스를 제공하는 모델을 제안하고 적용 예를 통하여 확인한다.

  • PDF

Adaptive Automata using Symbolic Multi-Valued Logic Function (기호 다치 논리 함수를 이용한 적응오토마타)

  • 정환묵;손병성
    • Journal of the Korean Institute of Intelligent Systems
    • /
    • v.6 no.4
    • /
    • pp.10-16
    • /
    • 1996
  • In this paper, we construct the state table of the automata according to input, state, and change of state and transform that state table into symbolic multi-valued logic formula. Also, we propose an adaptive automata which adapts dynamically change of state aqording to the input string of automata by using the properties of derivative about the symbolic multi-valued logic function. And we analyze the properties of the adaptive automata.

  • PDF

Implementation of multiple valued squential circuit using decision diagram (결정도에 의한 다치 순차회로 구현)

  • 김성대;김휘진;박춘명;송홍복
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 1999.11a
    • /
    • pp.278-281
    • /
    • 1999
  • In this paper, Squential circuit was implemented by decision diagram that can analyze and test large amount of functions easily. First of all, Memery device of multiple valued squential circuit was used D F/F, implemented with CMOS current mode. The opreation property of this circuit involved by PSPICE simulation. The result of Decision Diagram sequential circuit is simple and regular for selecting wire routing and posesses the property of analyze, testing. so it suitable for VLSI implementation.

  • PDF

The Optimization of Current Mode CMOS Multiple-Valued Logic Circuits (전류구동 CMOS 다치 논리 회로설계 최적화연구)

  • Choi, Jai-Sock
    • Journal of the Institute of Convergence Signal Processing
    • /
    • v.6 no.3
    • /
    • pp.134-142
    • /
    • 2005
  • The implementation of Multiple-Valued Logic(MVL) based on Current-Mode CMOS Logic(CMCL) circuits has recently been achieved. In this paper, four-valued Unary Multiple-Valued logic functions are synthesized using current-mode CMOS logic circuits. We properly make use of the fact that the CMCL addition of logic values represented using discrete current values can be performed at no cost and that negative logic values are readily available via reversing the direction of current flow. A synthesis process for CMCL circuits is based upon a logically complete set of basic elements. Proposed algorithm results in less expensive realization than those achieved using existing techniques in terms of the number of transistors needed. As an alternative to the cost-table techniques Universal Unary Programmable Circuit (UUPC) for a unary function is also proposed.

  • PDF

A Constructing theory of multiple-valued Switching functions (다치논리회로의 구성이론)

  • 고경식;김현수
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.17 no.2
    • /
    • pp.29-36
    • /
    • 1980
  • This paper presents a method for constructing multiple- valued switching functions based on Galois fields. First the constructing Inethod for single- variable switching functions is developers and the results are extended to multiple- variable functions. The fundalnental Inathelnatical properties used in this paper are. (1) The sum of all elements over CF of is zero. (2) The Product of nonzero elements over GF(N) is equal to e1 for Neven, and e1( ) for N odd. With these properties, a relatlvely simple constructing method is developed, and a process for determining the coefficients of the expanded forms of switching functions is also obtained without successive multiplication of the polynomials. Some examples are given to illustrate the method.

  • PDF

A Study on Minimization of Multiple-Valued Logic Funcitons using M-AND, M-OR, NOT Operators (M-AND, M-OR, NOT 연산을 이용한 다치 논리 함수의 간단화에 관한 연구)

  • 송홍복;김영진;김명기
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.17 no.6
    • /
    • pp.589-594
    • /
    • 1992
  • This paper offers the simplification method of Multiple-Valued logic function based on M-AND,M-OR, NOT operation presented by Lukasiewicz. First in performing the simplification the result is different by the method to arrange Cube, the method to find the most effective adjacent term if, most of all, important in simplification. According to this method, the two-variable multiple-valued logic function given by truth table is decomposed. The simplification method in this paper proves that the number of devices and cost is considerably reduced comparing with the existing method 141 to realize the same logic functions.

  • PDF