• Title/Summary/Keyword: 나노기판

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Effects of Platinum Nano Electrodeposits on the Corrosion of Carbon Substrate in an Acidic Environment (백금 나노 도금입자가 산성 환경에서 탄소기판 부식에 미치는 영향)

  • Choe, Min-Ho;Park, Chan-Jin
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2008.11a
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    • pp.34-35
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    • 2008
  • We investigated the effects of Pt nano electrodeposits on the corrosion of carbon substrate in an acidic solution. The electrodes for experiments were prepared by electrodepositing Pt on carbon substrate in a solution of 5 mM $H_2PtCl_6$ and 0.5 M $H_2SO_4$ using pulse deposition technique. In cyclic voltammograms for the carbon electrodes with and without Pt nano electrodeposits, total anodic current including both currents from oxygen evolution reaction and carbon corrosion increased abruptly above a critical potential. In addition, the critical potential of the carbon electrodes with Pt nano electrodeposits was lower than that of bare carbon electrode. This phenomenon was more prominent at $75^{\circ}C$ than $25^{\circ}C$. In potentiostatic experiments, the current transients and the corresponding power spectral density increased with increasing the applied potential for the electrodes. Furthermore, the current transients for the carbon electrodes with Pt nano electrodeposits were much higher than those for the bare carbon substrate. This indicates that the corrosion of carbon substrate can be highly accelerated by Pt nano electrodeposits.

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Investigation of Synthesis Yield and Diameter Distribution of Single-Walled Carbon Nanotubes Grown at Different Positions in a Horizontal CVD Chamber (수평형 CVD 장치에서 기판 위치에 따른 단일벽 탄소나노튜브의 합성 수율 및 직경 분포 고찰)

  • Jo, Sung-Il;Jeong, Goo-Hwan
    • Journal of the Korean institute of surface engineering
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    • v.52 no.6
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    • pp.357-363
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    • 2019
  • We investigated a synthesis yield and diameter distribution of single-walled carbon nanotubes (SWNTs) with respect to the growth position in a horizontal chemical vapor deposition (CVD) chamber. Thin films and line-patterned Fe films (0.1 nm thickness) were prepared onto ST-cut quartz substrates as catalyst to compare the growth behavior. The line-patterned samples showed higher growth density and parallel alignment than those of the thin film catalyst samples. In addition, line density of the aligned SWNTs at central region of the chamber was 7.7 tubes/㎛ and increased to 13.9 tubes/㎛ at rear region of the CVD chamber. We expect that the enhanced amount of thermally decomposed feedstock gas may contribute to the growth yield enhancement at the rear region. In addition, the lamina flow in the chamber also contribute to the perfect alignment of the SWNTs based on the value of gas velocity, Reynold number, and Knudsen coefficient we employed.

Improving the Thermal Stability of Ni-silicide using Ni-V on Boron Cluster Implanted Source/drain for Nano-scale CMOSFETs (나노급 CMOSFET을 위한 Boron Cluster(B18H22)가 이온 주입된(SOI 및 Bulk)기판에 Ni-V합금을 이용한 Ni-silicide의 열안정성 개선)

  • Li, Shu-Guang;Lee, Won-Jae;Zhang, Ying-Ying;Zhun, Zhong;Jung, Soon-Yen;Lee, Ga-Won;Wang, Jin-Suk;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.6
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    • pp.487-490
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    • 2007
  • In this paper, the formation and thermal stability characteristics of Ni silicide using Ni-V alloy on Boron cluster ($B_{18}H_{22}$) implanted bulk and SOI substrate were examined in comparison with pure Ni for nano-scale CMOSFET. The Ni silicide using Ni-V alloy on $B_{18}H_{22}$ implanted SOI substrate after high temperature post-silicidation annealing showed the lower sheet resistance, no agglomeration interface image and lower surface roughness than that using pure Ni. The thermal stability of Ni silicide was improved by using Ni-V alloy on $B_{18}H_{22}$ implanted SOI substrate.

Formation of electric circuit for printed circuit board using metal nano particles (금속 나노 입자를 이용한 인쇄 회로 기판의 회로 형성)

  • Joung, Jae-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.545-545
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    • 2007
  • Recently, innovative process has been investigated in order to replace the conventional high-cost micro patterning processes on the electronic products. To produce desirable profit margins from this low cost products, printed circuit board(PCB), will require dramatic changes in the current manufacturing philosophies and processes. Innovative process using metal nano particles replaces the current industry standard of subtractive etched of copper as a highly efficient way to produce robust circuitry on low cost substrates. An advantage of using metal nano particles process in patterned conductive line manufacturing is that the process is additive. Material is only deposited in desired locations, thereby reducing the amount of chemical and material waste. Simply, it just draws on the substrate as glass epoxy or polyimide with metal nano particles. Particles, when their size becomes nano-meter scale, show some specific characteristics such as enhanced reactivity of surface atoms, decrease in melting point, high electric conductivity compared with the bulk. Melting temperature of metal gets low, the metal nano particles could be formated onto polymer substrates and sintered under $300^{\circ}C$, which would be applied in PCB. It can be getting the metal line of excellent electric conductivity.

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Characteristics of ITO Transparent Conductive Oxide by DC Magnetron Sputter Methode (DC 마그네트론 스퍼터를 이용한 ITO 투명도전막 특성)

  • Cho, Ki-Taek;Choi, Hyun;Yang, Seung-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.269-269
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    • 2007
  • 최근 평판디스플레이 산업이 성장함에 따라 품질향상을 위한 연구가 활발히 진행중이며 또한, 부품 소재 개발에 박차를 가하고 있다. 대형 평판디스플레이 중 낮은 전력소모와 광시야각이 우수한 TFT-LCD가 각광받고 있다. TFT-LCD 소자의 투명전극으로 사용되기 위해서는 면저항 10~1k Ohm/sq., 광투과율 85% 이상의 특성이 요구되며 ITO(Indium Tin Oxide의 약자) 타겟을 스퍼터링한 박막이 일반적으로 사용되고 있다. 본 연구에서는 $In_2O_3$ 나노 분말 제조 공법으로 제작된 ITO 타겟을 사용하여 양산성 및 대형화에 적합한 DC 마그네트론 스퍼터 방식으로 투명전극을 제조하였다. 일반적으로 사용되는 고정식 DC 마그네트론 스퍼터 방식은 타겟표면에 재증착(back deposition)되는 저급산화물로 인해 이물 또는 노즐(Nodule) 이 형성되고 이로 인해 비이상적이고 불안정한 방전 플라즈마가 박막의 특성을 저하시킨다. 이러한 문제점을 해결하기 위해 이동식 DC 마그네트론 스퍼터 방식을 채택하였으며 대형 타겟을 이용한 대형화 기판 제작과 안정적인 sputter yield로 인해 uniformity가 우수한 ITO 박막을 제조하였다. ITO 박막의 저면저항 고투과율 특성을 구현하기 위해 공정변수인 산소분압, 전류밀도(DC power) 그리고 증착온도에 따른 ITO 박막의 미세조직과 결정성을 관찰하였으며 전기적 특성을 분석하였다.

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Development of Spray Coating Methods for Large Area Sol-Gel ZnO/Ag Nanowire Composite Transparent Conducting Substrates (대면적 졸-겔 산화아연/은 나노선 복합 투명 전도 기판 제조를 위한 스프레이 코팅법 개발)

  • Cho, Wonki;Baik, Seung Jae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.1
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    • pp.55-60
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    • 2018
  • Transparent conductive thin films (TCFs) are essential materials for solar cells, organic light-emitting diodes, and display panels. Indium tin oxide (ITO) is one of the most widely used commercial materials to create TCFs'; however, new materials that can possibly replace ITO at a lower cost and/or those possessing mechanical flexibility are urgently needed. Silver nanowire (AgNW) is one of those promising materials, as it is less expensive and possesses superior mechanical flexibility as compared to ITO. We used AgNW and sol-gel ZnO to fabricate composite thin films by spray coating. We propose two spray-coating methods: the 'metal-organic chemical vapor deposition (MOCVD)/AgNW' method and the Mixture method. These two methods are expected to be commercialized for high-quality and low-cost products, respectively.

Studies on Fine Metal Droplet Jetting using Piezoelectric Inkjet Head (압전 잉크젯 헤드를 이용한 미세금속액적 토출 연구)

  • Park, Chang-Sung;Kim, Young-Jae;Sim, Won-Chul;Park, Jung-Hoon;Kang, Pil-Joong;Yoo, Young-Seuck;Joung, Jae-Woo
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1550-1551
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    • 2007
  • 노즐 직경 $30\;{\mu}$인 MEMS 압전 잉크젯 헤드를 이용하여 Ag 나노 잉크를 PDMS 처리된 PI(Polyimide) 기판 위에 토출하였다. 구동주파수 5 KHz에서 액적부피 1.5 pl, 속도가 약 4.5 m/s인 액적이 토출 되었다. 인쇄된 액적의 크기는 직경 약 $12\;{\mu}m$이었다. 메니스커스의 거동에 맞춘 구동파형의 입력에 의해 새틀라이트 없는 매우 작은 액적을 토출할 수 있었다.

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AC based AAO NanoStructure Growth Control (교류 전압에 의한 AAO 나노 구조 성장 제어)

  • Park, So-Jeong;Huh, Jung-Hwan;Yee, Seong-Min;Lee, Kang-Ho;Kim, Gyu-Tae;Park, Sung-Chan;Ha, Jeong-Sook
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.87-88
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    • 2005
  • AAO(Anodic Aluminum Oxide)는 양극산화 방법을 이용하여 얻을 수 있는 알루미늄의 다공성 산화막이다. 기존의 방법에서는 DC전압을 이용하여 AAO를 성장시켰는데 본 연구에서는 AC전압을 이용하여 AAO의 성장 특성을 제어하였다. 전압원으로 DAQ를 사용하였는데 출력전압을 증폭하기 위하여 2 단 차동증폭기를 제작하였다. 실험 결과는 AAO 기판의 SEM 사진을 촬영, 분석함으로써 얻을 수 있었다. SEM 시진을 분석한 결과 pore size는 전압의 변화에 큰 영향을 받지 않음을 알 수 있었던 반면 성장 길이는 AC전압의 주기가 증가함에 따라 길어지는 성향을 확인할 수 있었다. 또한 주기와 AAO 성장 길이와의 관계를 로그스케일 그래프로 나타내보면 선형적인 특성을 나타내었다. 이를 통해 인가한 전압의 주파수에 따라 AAO의 성장 길이를 예측할 수 있었다.

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Microstructural analysis and characterization of 1-D ZnO nanorods grown on various substrates (다양한 기판위에 성장한 1차원 ZnO 나노막대의 특성평가 및 미세구조 분석)

  • Kong, Bo-Hyun;Kim, Dong-Chan;Cho, Hyung-Koun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.116-117
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    • 2006
  • I-D ZnO nanostructures were fabricated by thermal evaporation method on Si(100), GaN and $Al_2O_3$ substrates without a catalyst at the reaction temperature of $700^{\circ}C$. Only pure Zn powder was used as a source material and Ar was used as a carrier gas. The shape and growth direction of synthesized ZnO nanostructures is determined by the crystal structure and the lattice mismatch between ZnO and substrates. The ZnO nanostructure on Si substrate were inclined regardless of their substrate orientation. The origin of ZnO/Si interface is highly lattice-mismatched and the surface of the Si substrate inevitably has the $SiO_2$ layer. The ZnO nanostructure on the $Al_2O_3$ substrate was synthesized into the rod shape and grown into particular direction. For the GaN substrate, however, ZnO nanostructure with the honeycomb-like shape was vertically grown, owing to the similar lattice parameter with GaN substrate.

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Thermal Stability Improvement of Ni-Silicide on the SOI Substrate Doped B11 for Nano-scale CMOSFET (나노급 CMOSFET을 위한 SOI기판에 Doping된 B11을 이용한 Ni-Silicide의 열안정성 개선)

  • Jung, Soon-Yen;Oh, Soon-Young;Kim, Yong-Jin;Lee, Won-Jae;Zhang, Ying-Ying;Zhong, Zhun;Li, Shi-Guang;Wang, Jin-Suk;Lee, Hi-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.24-25
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    • 2006
  • In this study, Ni silicide on the SOI substrate doped B11 is proposed to improve thermal stability. The sheet resistance of Ni-silicide utilizing pure SOI substrate increased after the post-silicidation annealing at $600^{\circ}C$ for 30 min. However, using the proposed B11 implanted substrate, the sheet resistance showed stable characteristics after the post-silicidation annealing up to $700^{\circ}C$ for 30 min.

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