• Journal of IKEEE
• /
• v.24 no.4
• /
• pp.1104-1108
• /
• 2020

This paper propose a variable proportional resonant feedforward algorithm for reducing the speed ripple of a three-phase permanent magnet synchronous motor. In general, the torque ripples can be generated by electrical pulsation due to current measurement errors and dead time and mechanical pulsation because of rotor eccentricity and eccentric load. These torque pulsations can cause speed pulsations of the motor and degrade the operating performance of the motor drive system. Therefore, in this paper, the factors of the speed ripple is analyzed and an algorithm to reduce the speed ripple is proposed. The proposed algorithm applied a variable proportional resonant controller in order to reduce the specific operating frequency included in the speed pulsation, and utilized a feedforward compensation controller structure to perform the compensation operation. The proposed algorithm is verified through various experiments.

• Prospectives of Industrial Chemistry
• /
• v.24 no.5
• /
• pp.1-14
• /
• 2021

유무기 하이브리드 금속-할라이드계 페로브스카이트(organic-inorganic metal halide perovskite) 페로브스카이트 반도체 소재는 광전자 소자와 소재 연구에 새로운 연구 흐름을 만들고 있다. 태양전지 성능이 불과 과거 몇 년 사이의 짧은 연구 기간에도 불구하고, 광-전 변환 소자 중에서도 단일 소자와 적층 소자(tandem)에서 높은 광-전 변환 효율을 나타내기 때문이다. 이러한 급격한 연구 성과와 성장에도 불구하고, 페로브스카이트 소재의 다양한 광전자 특성의 평가와 결과에 대한 논의가 필요한 상황이다. 특히 내부 이온 이동이 광전자 원거리 이동 특성 평가와 해석에 영향을 주는 경우, 페로브스카이트 소재를 기반으로 한 다양한 광전자 소자의 성능 향상과 해석에 여전히 모호함을 준다. 달리 얘기하면, 이 소재의 기초 특성을 이해하고자 적용하는 다양한 기존 특성 평가 분석법의 활용과 해석에도 복잡한 영향을 미치고 있다고 할 수 있다. 이러한 페로브스카이트 소재 내에서 광전자 원거리 이동을 측정하는 새로운 방법을 소개하고자 한다. 첫 번째 방법으로, Quasi-steady 상태에서 광전도도를 전기적 특성으로 측정하고, 광조사 하에 투과 및 반사를 광학적으로 측정하여, 전도도와 광전자 밀도를 동시에 평가하는 방법으로, photo-induced transmission and reflection (PITR) 분광분석법이다. 이 분광분석법은 실제 소자의 구동조건을 구현한 상태에서 광전자의 원거리 이동에서 발생하는 광전자 밀도 변화를 반영한 광전자 이동도 특성 평가라는 장점을 가지고 있다. 두 번째 방법으로, 기존의 연속 전압 인가 방법 대신 펄스형 전압 인가 방식을 도입하는 방법으로, pulsed voltage space charge limited current (PV-SCLC) 분석법이다. 이는 펄스형 전압 인가 방법으로 이온의 이동을 최소화하여, 전류-전압 측정에서 히스테리시스가 없고 측정결과의 재현성과 신뢰도가 매우 높은 장점이 있다.

• Journal of IKEEE
• /
• v.26 no.3
• /
• pp.500-505
• /
• 2022

In this study, we designed oxide thin-film transistors (TFTs) with dual gate and tri layered split channels, and investigated the structural effect of the TFTs on the electrical characteristics. The dual gates played a key role in increasing the driving current, and the channel structure of tri layers and split form contributed to the increase in the carrier mobility. The tri layered channels consisting of the a-ITGZO and two ITO layers inserted between the gate dielectric and a-ITGZO led to the increase in the on-current by using ITO layers with high conductivity, and the split channels lowered series resistance of the channels. Compared with the mobility (15 cm²/V·s) of the single gate a-ITGZO TFT, the mobility (134 cm²/V·s) of the dual gate tri-layer split channel TFT was remarkably enhanced by the structural effect.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.17 no.3
• /
• pp.441-448
• /
• 2022

In the distribution system, there are multiple power protection systems such as circuit breakers at substations, and reclosers, minimum circuit ampacities, fault interrupters on distribution lines. They are widely used to prevent partial outages, cascading power failure or blackout so that other healthy systems could maintain the integrity in case of the instant fault or permanent failure on the power lines. However, when a fault happens, it could cause a major black out due to the lack of the protection cooperation between the protection relay of the circuit breaker at a substation and a protection system on the distribution lines. To achieve the power system integrity better, it is required to develop the circuit breaker which can be operational within 1 cycle(16ms). In this study, the high speed circuit breaker which is filled up with eco-friendly gas is developed. This equipment achieved an excellent test results based on IEC 62271-111 standard. It is respected that this equipment would contribute to prevent the wide area blackout by isolating a fault area quicker and faster.

• Journal of the Korean Applied Science and Technology
• /
• v.40 no.1
• /
• pp.179-187
• /
• 2023

Nanogenerators containing biomaterials are eco-friendly electronic devices in terms of being a non-polluting energy source and biodegradable electronic waste. In particular, the amount of waste will be also reduced if the biomaterial can be extracted from biowaste. In this study, a triboelectric nanogenerator was fabricated using animal collagen present in the skin of a mammal and its characteristion was proformed. The electro-anodic layer of the triboelectric nanogenerator was constructed by forming a collagen film using the spin coating method, and it was confirmed that the film was porous from scanning electron microscopy. The fabricated triboelectric nanogenerator exhibited an open-circuit voltage from 7 V at 3 Hz to 15 V at 5 Hz due to periodic mechanical movement, and a short-circuit current of 3.8 uA at 5 Hz. In conclusion, collagen-containing triboelectric nanogenerators can be power source for low-power operating devices such as sensors and are also expected to be useful for reducing electronic waste.

• Journal of the Microelectronics and Packaging Society
• /
• v.30 no.4
• /
• pp.32-43
• /
• 2023

Resistive Random Access Memory (RRAM), based on resistive switching characteristics, is emerging as a next-generation memory device capable of efficiently processing large amounts of data through its fast operation speed, simple device structure, and high-density implementation. Interface type resistive switching offer the advantage of low operation currents without the need for a forming process. Especially, for RRAM devices based on transition metal oxides, various studies are underway to enhance the memory characteristics, including precise material composition control and improving the reliability and stability of the device. In this paper, we introduce various methods, such as doping of heterogeneous elements, formation of multilayer films, chemical composition adjustment, and surface treatment to prevent degradation of interface type resistive switching properties and enhance the device characteristics. Through these approaches, we propose the feasibility of implementing high-efficient next-generation non-volatile memory devices based on improved resistive switching properties.

• Journal of the Korean Electrochemical Society
• /
• v.11 no.2
• /
• pp.109-114
• /
• 2008

Though ethanol can theoretically generate 12 electrons during oxidation to carbon dioxide, the complete oxidation of ethanol is hard to achieve due to the strong bond between the two carbons in its molecular structure. Therefore, development of high activity catalyst for ethanol oxidation is necessary for the commercialization of direct ethanol fuel cell. In this study, some binary and ternary electrocatalysts of PtSn/C and PtSnAu/C have been synthesized and characterized. The catalysts were fabricated with modified polyol method with the amounts of 20 wt%, where the Pt : Sn ratios in the PtSn/C were 1 : 0, 4 : 1, 3 : 1, 2 : 1, 1.5 : 1, 1 : 1, 1 : 1.5 and Pt:Sn:Au ratios in the PtSnAu/C were 5 : 5 : 0, 5 : 4 : 1, 5 : 3 : 2, 5 : 2 : 3. From the XRD and TEM analysis results, the catalysts were found to have face centered cubic structure with particle size of around $1.9{\sim}2.4\;nm$. The activity in the ethanol oxidation was examined with cyclic voltammetry and the results indicated that PtSn(1.5 : 1)/C and PtSnAu(5 : 2 : 3)/C had the highest activity in each catalyst system. Further tests with single cell were performed with those catalysts. It was found that PtSn/C(1.5 : 1) exhibited the best performance while the long term stability of PtSnAu/C(5 : 2 : 3) is better than PtSn/C(1.5 : 1).

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.17 no.10
• /
• pp.2359-2368
• /
• 2013

In this paper, an IRD (internal read data) circuit preventing the reentry into the read mode while keeping the read-out DOUT datum at power-up even if noise such as glitches occurs at signal ports such as an input signal port RD (read) when a power IC is on, is proposed. Also, a pulsed WL (word line) driving method is used to prevent a DC current of several tens of micro amperes from flowing into the read transistor of a differential paired eFuse OTP cell. Thus, reliability is secured by preventing non-blown eFuse links from being blown by the EM (electro-migration). Furthermore, a compared output between a programmed datum and a read-out datum is outputted to the PFb (pass fail bar) pin while performing a sensing margin test with a variable pull-up load in consideration of resistance variation of a programmed eFuse in the program-verify-read mode. The layout size of the 8-bit eFuse OTP IP with a $0.18{\mu}m$ process is $189.625{\mu}m{\times}138.850{\mu}m(=0.0263mm^2)$.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.18 no.1
• /
• pp.115-122
• /
• 2014

In this paper, reliability is secured by sensing a post-program resistance of several tens of kilo ohms and restricting a read current flowing over an unblown eFuse within $100{\mu}A$ since RWL driver and BL pull-up load circuits using a regulated voltage of V2V ($=2V{\pm}10%$) are proposed to have a wide operating voltage range for eFuse OTP memory. Also, when a comparison of a cell array of 1 row ${\times}$ 32 columns with that of 4 rows ${\times}$ 8 columns is done, the layout size of 4 rows ${\times}$ 8 columns is smaller with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$) than that of 1 row ${\times}$ 32 columns with $735.96{\mu}m{\times}61.605{\mu}m$ ($=0.04534mm^2$).

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.1
• /
• pp.53-60
• /
• 2004

This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.