• Journal of the Korean Data and Information Science Society
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• v.22 no.4
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• pp.679-690
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• 2011

Two widely used approaches for improving the quality of the output of a process are statistical process control (SPC) and automatic process control (APC). In recent hybrid processes that combine aspects of the process and parts industries, process variations due to both the inherent wandering and special causes occur commonly, and thus simultaneous application of APC and SPC schemes is needed to effectively keep such processes close to target. The simultaneous implementation of APC and SPC schemes is called integrated process control (IPC). In the IPC procedure, the output variables are monitored during the process where adjustments are repeatedly done by its controller. For monitoring the APC-controlled process, control charts can be generally applied to the output variable. However, as an alternative, some authors suggested that monitoring the input variable may improve the chance of detection. In this paper, we evaluate the performance of several monitoring statistics, such as the output variable, the input variable, and the difference variable, for efficiently monitoring the APC-controlled process when we assume IMA(1,1) noise model with a minimum mean squared error adjustment policy.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.815-817
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• 2012

본 논문에서는 차량 충돌 예방 레이더 시스템-온-칩용 77GHz 고주파 전단부(RF front-end)를 제안한다. 이러한 고주파 전단부는 77GHz의 동작주파수를 가진 저 잡음 증폭기와 고주파 전력 증폭기로 구성된다. 이러한 회로는 TSMC $0.13{\mu}m$ 혼성신호/고주파 CMOS 공정 ($f_T/f_{MAX}=120/140GHz$)으로 설계되어 있다. 저잡음 증폭기의 경우 전압이득이 36dB로 최근 발표된 연구결과 중 가장 우수한 수치를 보였다. 전력 증폭기는 포화전력과 출력 $P_{1dB}$이 18dBm과 15dBm으로 기존 연구결과 중 가장 우수한 결과를 각각 보였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.6
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• pp.893-899
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• 2000

A 900 MHz low-noise amplifier(LNA) with a measured noise figure of 4.8 dB and an associated gain of 13.2 dB was fabricated in a 0.65 $\mu$m CMOS. The inductive source architecture of offers the possibility of achieving the best noise performance. At 900 MHz, the fabricated LNA dissipates 39 mW from a single 3 V power supply including the bias circuitry and provides -26dB input return loss, -17 dB output return loss, and an input 1-dB compression level of -12 dBm.

• Journal of IKEEE
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• v.21 no.3
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• pp.264-267
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• 2017

In this paper, A low dropout (LDO) regulator that improves the power supply rejection ratio by using a noise canceling circuit is proposed. The noise rejection circuit between the error amplifier and the pass transistor is designed to reduce the influence of the pass transistor on the noise coming from the voltage source. The LDO regulator has the same regulation characteristics as the conventional LDO regulator. The proposed circuit uses 0.18um process and Cadence's Virtuoso and Specter simulator.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.62-66
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• 2016

This paper presents a MedRadio-band low power low noise amplifier for Medical Devices. A proposed MedRadio-band low power low noise amplifier adopts a current-reuse resistive feedback topology to increase overall gm and reduce power consumption. The gain of the LNA increases by the Q-factor of the additional series RLC input matching network, and its noise figure is minimized by the similar factor. Furthermore, it consumes low power because of low supply voltage and current reuse technique. By exploiting the $g_m$-booting and matching network property, the proposed MedRadio-band low noise amplifier achieves a noise figure of 0.85 dB, a voltage gain of 30 dB, and IIP3 of -7.9 dBm while consuming 0.18 mA from a 1 V supply voltage in $0.13{\mu}m$ CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.54-61
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• 2007

A variable gain low noise amplifier (VG-LNA) implemented in TSMC 0.18 um process is presented. This VG-LNA is designed of two stage amplifier, and its gain is controlled by the shunt feedback loop composed of a gain control transistor (GCT) and a coupling capacitor in second stage. The channel resistance of GCT in the shunt feedback loop influences the input and output stages of a second stage by the Miller effect. Total gain of the proposed VG-LNA is changed by two factors, the load impedance reduction and the interstage mismatch by controlling the channel resistance of the GCT. Consequently, by adding a shunt feedback with a gain control transistor, this proposed VG-LNA achieves both wide gain tuning range of 37 dB and continuous gain control simultaneously.

• The Korean Journal of Applied Statistics
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• v.16 no.1
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• pp.71-85
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• 2003

In the economic design of the process control procedure, where quality is measured at certain time intervals, its properties are difficult to derive due to the discreteness of the measurement intervals. In this paper a Markov chain representation of the process monitoring procedure is developed and used to derive its properties when the process follows an ARIMA(0,1,1) model, which is designed to describe the effect of the noise and the special cause in the process cycle. The properties of the Markov chain depend on the transition matrix, which is determined by the control procedure and the process distribution. The derived representation of the Markov chain can be adapted to most different types of control procedures and different kinds of process distributions by obtaining the corresponding transition matrix.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.8
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• pp.47-52
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• 2010

In this paper, a phase-locked loop with a self-noise suppressing voltage controlled oscillator to improve a phase noise characteristic has been proposed. The magnitude of the proposed transfer function is maximum 25dB lower than that of a conventional transfer function around a bandwidth. The proposed PLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by HSPICE simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.91-97
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• 2004

A digital over-sampling noise-shaping coder to achieve the processing accuracy for the audio signal bandwidth is designed. In order to implement an optimized design of the noise-shaping coder as a form of U (intellectual property), circuit design techniques that optimize the multiplication and the ROM architectures are proposed with emphasis on the low-voltage operation under 2.0 V and the minimization of the hardware resources. In the design and verification methodology, the overall architectures and the internal bit width have been determined through behavioral simulations. The overall performances including timing margin have been estimated through transistor-level simulations. Furthermore, the test results of the implemented chip using a 0.35-${\mu}{\textrm}{m}$ standard CMOS process proposed the validity of the proposed circuits and the design methodology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.1
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• pp.68-72
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• 2004

The integrated voltage-controlled-oscillator(VOC) operating at 1.75 ㎓ is designed using the InGaP/GaAs HBT process. The proposed noise removal circuit and FR-4 substrate structure in this letter show the better characteristic of the phase noise and reduce the size of the VCO. The frequency tuning range of the VCO is about 200 ㎒ and the phase noise at 120 ㎑ offset is -119.3 ㏈c/㎐. The power consumption of the VCO core is 11.2 ㎽ at 2.8 V supply voltage and the output power is -2 ㏈m. The calculated figure of merit(FOM) is 191.7, which shows the best performance compared with the previous FET or HBT VCO.