• Journal of Advanced Navigation Technology
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• v.24 no.2
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• pp.107-114
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• 2020

A power amplifier of 2.4 GHz ISM band is designed to implement a transmitter system. High efficiency amplifiers can be implemented as class E or class F amplifiers. This study has designed a 20 W high efficiency class E amplifier that has simple circuit structure in order to utilize for the ISM band application. The impedance matching circuit was designed by class E design theory and circuit simulation. The designed amplifier has the output power of 44.2 dBm and the power added efficiency of 69% at 2.45 GHz. In order to apply 30 dBm input power to the designed power amplifier, voltage controlled oscillator (VCO) and driving amplifier have been fabricated for the input feeding circuit. The measurement of the power amplifier shows 43.2 dBm output and 65% power added efficiency. This study can be applied to the design of power amplifiers for various wireless communication systems such as wireless power transfer, radio jamming device and high power transmitter.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.180-184
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• 2013

In this paper, a low power antenna switch controller IC is designed using a silicon-on-insulator (SOI) CMOS technology. To improve power handling capability and harmonic distortion performance of the antenna switch, the proposed antenna switch controller provides 3-state logic level such as +VDD, GND, and -VDD for the gate and body of switch of FETs according to decoder signal. By employing input-coupled current ring oscillator and hardware efficient level shifter, the proposed controller greatly reduces power consumption and hardware complexity. It consumes 135 ${\mu}A$ at a 2.5 V supply voltage in active mode, and occupies $1.3mm{\times}0.5mm$ in area. In addition, it shows fast start-up time of 10 ${\mu}s$.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.4
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• pp.28-34
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• 2000

In this paper, a continuous-time filter for low voltage and high frequency applications using fully-balanced current integrators is presented. As the balanced structure of integrator circuits, the designed filter has improved noise characteristics and wide dynamic range since even-order harmonics are cancelled and the input signal range is doubled. Using complementary current mirrors, bias circuits are simplified and the cutoff frequency of filters can be controlled easily by a single DC bias current. As a design example, the 3rd-order lowpass Butterworth filter with a leapfrog realization is designed. The designed fully-balanced current-mode filter is simulated and examined by SPICE using 0.65${\mu}{\textrm}{m}$ CMOS n-well process parameters. The simulation results show 50MHz cutoff frequency, 69㏈ dynamic range with 1% total harmonic distortion(THD), and 4㎽ power dissipation with a 3V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.4
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• pp.93-103
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• 2002

A new current mirror for high-accuracy current-mode signal processing and integrated circuit design was proposed. The current mirror adopts the technique of an adaptive feedback to reduce the input impedance and the output stage of regulated cascode current mirror to increase the output impedance. Simulation results show that the current mirror has input impedance of 0.9Ω, the output impedance of 415 MΩ, and current gain of 0.96 at the supply voltage Vcc=5V. The power dissipation is 1.5㎽. In order to certify the applicability of the proposed current mirror, a voltage-to-current converter using the current mirror is designed. Simulation results show that the converter has good agreement with theoretical equation and has three times better conversion characteristics when compared with voltage-to-current converter using Wilson current mirror.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.86-90
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• 2007

An efficient sensing scheme applicable to DC-DC converters is proposed. The output voltage of the DC-DC converter is fed back and converted to a current signal at the input terminal of the sensor to decide if it is in the tolerable range. The comparison is accomplished by a current push-pull action. With the embedded reference current in the sensor realized from the reference voltage. The advantages of the scheme lie in the fairly accurate and efficient implementation in terms of power consumption and chip size overhead compared with conventional voltage-mode schemes as the major parameter in converting voltage to current is determined by (W/L) aspect ratio of the core transistors. In this paper, a DC-DC converter of 5V output from battery range of 2.2V${\sim}$3.6V adopting the proposed sensing scheme is implemented in a 0.35um CMOS process to prove the validity of the scheme.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.10
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• pp.59-65
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• 2008

We have proposed a UHF/HF multi-band RFID reader, and have implemented it into a system in a package(SiP). The proposed SiP RFID reader has been designed to support both for EPCgloabal Class1 Generation2 protocol of UHF band, and 13.56MHz RFID protocols of ISO14443 A/B type, and ISO15693 standards. The operating mode is controlled by embedded RISC core, and the mode can be selected by users. The area of implemented SiP is $40mm{\times}40mm$ with 4 metal layers. The implemented reader SiP operates at single supply voltage of 3.3V. The maximum current consumption is 210mA. The operating distances are 5cm for 13.56MHz modes, and 20cm for UHF mode.

• Journal of the Korean Society for Nondestructive Testing
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• v.30 no.4
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• pp.373-379
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• 2010

EMAT has been applied in various fields for flaw detection and material characterization because it has noncontact property in wave generation and a good mode selectivity. Unfortunately, however, EMAT shows low signal to noise ratio relative to commercial contact transducer because of low energy conversion efficiency. If the phase matching through the control of time delay between each coil consisting of the array EMAT is accomplished, it is expected that it will be a solution for the improvement of low signal to noise ratio. In this experiment, the phased array EMATs which consists of 3 or 4 meander coils and one big magnet were fabricated for surface and vertical shear wave generation. Effect of phased delay control on signal directivity and amplitude enhancement was verified. A slit with the depth of 0.5 mm and a side-drill hole of 0.5 mm diameter were clearly detected by fabricated phased array EMATs, respectively.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.32 no.7
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• pp.105-116
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• 2004

The design of pico-/nano-satellites is particularly challenging due to constraints in mass, volume, power, and surface area. An efficient low-cost picosatellite HAUSAT-1 Electrical Power Subsystem (EPS) is developed to supply the power for various loads during the full mission life. This paper addresses design and analysis results of solar arrays, batteries, power conditioning and distribution units. The component selection, manufacturing and test results are presented by considering appropriate development cost and performance. The simulation results of power system are also illustrated, according to operational modes, through energy balance analysis. Finally, the EFS design feasibility is verified by comparing analysis results with functional and environmental test results at the system and component levels, respectively.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.33 no.1
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• pp.104-109
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• 2005

The aircraft gas turbine engines with the Electronic Engine Controls(EEC) had been developed to save fuel and enhance their performance in the early days, and had employed the health monitoring function in the Full Authority Digital Engine Controls(FADEC) to improve their reliability. This has led to an increasing demand for the certification technology of these controls. The design and certification issues of power supply, aircraft supplied data, failure modes, software verification/validation, and lightning requirements need to be addressed. This paper presents the design considerations and the certification techniques applied to the electronic engine controls. And it is believed that this paper will be basis to establish a requirement in Korean Airworthiness Standard.

• Membrane Journal
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• v.14 no.1
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• pp.75-84
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• 2004

In this study, we present a noble study far membrane transport models using chlorine resistance of polyamide RO membranes. Membrane transport mechanism is investigated by the comparison of membrane permeation performance under the continuous and Intermittent operation modes with mixed feed solution containing NaOCl and NaCl. Analysis of permeation performance indicates that solution-diffusion model and preferential adsorption-capillary flow model are relatively efficient according to operation mode. Under the continuous flow state, mass transfer depends on preferential adsorption-capillary flow model rather than solution-diffusion model. On the other hand, it prefers solution-diffusion model to preferential adsorption-capillary flow model under the stationary state. SEM images of NaOCl treated membrane surfaces strongly support these conclusions. These surface images reveal that NaOCl treated membrane in continuous operation mode exhibits ridge and valley structure in some fraction of the surface area, whereas that in intermittent operation mode shows surface degradation entirely.