• Proceedings of the Korea Information Processing Society Conference
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• 2005.11a
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• pp.849-852
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• 2005

일반 행렬이나 불리언 행렬의 연산에 대한 많은 연구가 있다. 대부분의 연구는 두 행렬의 효율적 곱셈을 다루고 있으며 하드웨어나 소프트웨어적 응용에 적합한 다양한 알고리즘을 제시하였다. 모든 행렬 쌍의 곱셈에 대한 연구는 NP-완전 계산 복잡도와 이러한 곱셈을 요구하는 응용의 희소성으로 인해 관심밖에 있었으며 최근에야 원소가 불리언 값을 가지는 n 차 정사각 불리언 행렬을 대상으로 기초적인 연구 결과를 보이고 있다. 본 논문은 모든 n 차 정사각 불리언 행렬 사이의 곱셈을 보다 효율적으로 할 수 있는 벡터 기반 불리언 행렬 곱셈 이론과 이를 바탕으로 설계한 알고리즘 그리고 실행 결과에 대하여 논한다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.7 no.2
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• pp.73-92
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• 1997

A modular exponentiation( E$M^{$=varepsilon$}$mod N) is one of the most important operations in Public-key cryptography. However, it takes much time because the modular exponentiation deals with very large operands as 512-bit integers. Modular exponentiation is composed of repetition of modular multiplications, and the number of repetition is the same as the length of the addition-chain of the exponent(E). Therefore, we can reduce the execution time of modular exponentiation by finding shorter addition-chain(i.e. reducing the number of repetitions) or by reducing the execution time of each modular multiplication. In this paper, we propose an addition-chain heuristics and two fast modular multiplication algorithms. Of two modular multiplication algorithms, one is for modular multiplication between different integers, and the other is for modular squaring. The proposed addition-chain heuristics finds the shortest addition-chain among exisiting algorithms. Two proposed modular multiplication algorithms require single-precision multiplications fewer than 1/2 times of those required for previous algorithms. Implementing on PC, proposed algorithms reduce execution times by 30-50% compared with the Montgomery algorithm, which is the best among previous algorithms.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.4
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• pp.1867-1875
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• 2011

In this paper, a low-area 256-point FFT structure is proposed. For low-area implementation CSD(Canonic Signed Digit) multiplier method is chosen. Because multiplication type should be less for efficient CSD multiplier application to the FFT structure, the Radix-$4^2$ algorithm is chosen for those purposes. After, in the proposed structure, the number of multiplication type is minimized in each multiplication block, the CSD multipliers are applied for implementation of multiplication. Furthermore, in CSD multiplier implementation, cell-area is more reduced through common sub-expression sharing(CSS). The Verilog-HDL coding result shows 29.9% cell area reduction in the complex multiplication part and 12.54% cell area reduction in overall 256-point FFT structure comparison with those of the conventional structure.

• Journal of the Korea Society of Computer and Information
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• v.28 no.2
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• pp.69-75
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• 2023

Finite field arithmetic operations play an important role in a variety of applications, including modern cryptography and error correction codes. In this paper, we propose an efficient multiplication algorithm over finite fields using the Montgomery multiplication algorithm. Existing multipliers can be implemented using AND and XOR gates, but in order to reduce time and space complexity, we propose an algorithm using NAND and NOR gates. Also, based on the proposed algorithm, an efficient semi-systolic finite field multiplier with low space and low latency is proposed. The proposed multiplier has a lower area-time complexity than the existing multipliers. Compared to existing structures, the proposed multiplier over finite fields reduces space-time complexity by about 71%, 66%, and 33% compared to the multipliers of Chiou et al., Huang et al., and Kim-Jeon. As a result, our multiplier is proper for VLSI and can be successfully implemented as an essential module for various applications.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.2 s.302
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• pp.143-150
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• 2005

This paper proposes a new $radix-2^4$ FFT algorithm and an efficient pipeline architecture based on this new algorithm for OFDM systems. The pipeline architecture based on the new algorithm has the same number of multipliers as that of the $radix-2^2$ algorithm. However, the multiplier complexity could be reduced by more than $30\%$ by replacing one half of the programmable complex multipliers by the newly proposed CSD constant complex multipliers. From synthesis simulations of a standard 0.35um CMOS Samsung process, a proposed CSD constant complex multiplier achieved more than $60\%$ area efficiency when compared with the conventional programmable complex multiplier. This promoted efficiency can be used for the design of a long length FFT processor in wireless OFDM applications which needs more power and area efficiency.

• School Mathematics
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• v.13 no.2
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• pp.267-286
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• 2011

In this paper I investigated the historical developments of the algorithms for multiplication of natural numbers. Through this analysis I tried to describe more concretely what is to understand the common algorithm for multiplication of natural numbers. I found that decomposing dividends and divisors into small numbers and multiplying these numbers is the main strategy for carrying out multiplication of large numbers, and two decomposing and multiplying processes are very important in the algorithms for multiplication. Finally I proposed some implications based on these analysis.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.48-53
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• 2007

Some digital signal processing applications, such as FFT, request multiplications with a group(or, groups) of a few predetermined coefficients. In this paper, based on the modified CSD algorithm, an efficient multiplier design method for predetermined coefficient groups is proposed. In the multiplier design for sine-cosine generator used in direct digital frequency synthesizer(DDFS), and in the multiplier design used in 128 point $radix-2^4$ FFT, it is shown that the area, power and delay time can be reduced up to 34%.

• Journal of Elementary Mathematics Education in Korea
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• v.14 no.2
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• pp.287-314
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• 2010

The algorithm is a chain of mechanical procedures, capable of solving a problem. In modern mathematics educations, the teaching algorithm is performing an important role, even though contracted than in the past. The conspicuous characteristic of current elementary mathematics textbook's manner of manipulating multiplication algorithm is exceeding converge to 'standard algorithm.' But there are many algorithm other than standard algorithm in calculating multiplication, and this diversity is important with respect to didactical dimension. In this thesis, we have reconstructed the experimental learning and teaching plan of multiplication algorithm unit by making the best use of diversity of multiplication algorithm. It's core contents are as follows. Firstly, It handled various modified algorithms in addition to standard algorithm. Secondly, It did not order children to use standard algorithm exclusively, but encouraged children to select algorithm according to his interest. As stated above, we have performed teaching experiment which is ruled by new lesson design and analysed the effects of teaching experiment. Through this study, we obtained the following results and suggestions. Firstly, the experimental learning and teaching plan was effective on understanding of the place-value principle and the distributive law. The experimental group which was learned through various modified algorithm in addition to standard algorithm displayed higher degree of understanding than the control group. Secondly, as for computational ability, the experimental group did not show better achievement than the control group. It's cause is, in my guess, that we taught the children the various modified algorithm and allowed the children to select a algorithm by preference. The experimental group was more interested in diversity of algorithm and it's application itself than correct computation. Thirdly, the lattice method was not adopted in the majority of present mathematics school textbooks, but ranked high in the children's preference. I suggest that the mathematics school textbooks which will be developed henceforth should accept the lattice method.

• Proceedings of the Korean Information Science Society Conference
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• 2001.10a
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• pp.604-606
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• 2001

타원 곡선이 정의되는 유한체외 연산 중 곱셈에 대한 역원을 빠르게 구하는 것은 타원 곡선 암호시스템의 성능 향상에 있어 중요한 요소이다. 본 논문에서는 이진체 $F_{2m}$ 상에서 다항식 기저를 사용하는 경우 곱셈에 대한 역원을 빠르게 구하는 알고리즘을 제시한다. 이 알고리즘은 기약 다항식으로부터 미리 계산 가능한 테이블을 만들어 테이블 참조 방식으로 속도 향상을 꾀한다. 이 방법을 사용할 경우 이전에 알려진 가장 빠른 방법보다 10~20% 정도 성능 향상이 있다.다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.8
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• pp.1593-1600
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• 2009

There are two major algorithms to find a square root of floating point number, one is the Newton_Raphson algorithm and GoldSchmidt algorithm which calculate it approximately by iterating multiplications and the other is SRT algorithm which calculates it exactly by iterating subtractions. This paper proposes an exact floating point square root algorithm using only multiplication. At first an approximate inverse square root is calculated by Newton_Raphson algorithm, and then an exact square root algorithm by reducing an error in it and a compensation algorithm of it are proposed. The proposed algorithm is verified to calculate all of numbers in a single precision floating point number and 1 billion random numbers in a double precision floating point number. The proposed algorithm requires only the multipliers without another hardware, so it can be widely used in an embedded system and mobile production which requires an efact square root of floating point number.