• Title/Summary/Keyword: 고속 회로

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Wideband Class-J Power Amplifier Design Using Internal Matched GaN HEMT (내부정합된 GaN HMET를 이용한 광대역 J-급 전력증폭기 설계)

  • Lim, Eun-Jae;Yoo, Chan-Se;Kim, Do-Gueong;Sun, Jung-Gyu;Yoon, Dong-Hwan;Yoon, Seok-Hui;Rhee, Young-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.2
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    • pp.105-112
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    • 2017
  • In order to satisfy the diffusion of multimedia service in mobile communication and the demand for high-speed communication, it is essential to modify and improve high efficiency, wideband and nonlinear characteristic of multiband power amplifier. This research is designed to implement a single-stub matching circuit as a 2nd harmonic one that meets conditions of the Class-J power amplifier. Low characteristic impedance of the single-stub line is necessary to suit conditions of wideband Class-J. This research uses ceramic substrates having high permittivity to implement the single-stub line with low characteristic impedance, which eventually results in an amplifier satisfying the output impedance terms of Class-J in wideband frequency range. This result attributes to use of GaN HEMT packaged with a 2nd harmonic matching circuit and external fundamental circuit. The measurement results of the Class-J amplifier confirms the following characteristics: more than output power of 50 W(47 dBm) in bandwidth of 1.8~2.7 GHz(0.9GHz), maximum drain efficiency of 72.6 %, and maximum PAE characteristic of 66.5 %.

Design of Multiple-symbol Lookup Table for Fast Thumbnail Generation in Compressed Domain (압축영역에서 빠른 축소 영상 추출을 위한 다중부호 룩업테이블 설계)

  • Yoon, Ja-Cheon;Sull, Sanghoon
    • Journal of Broadcast Engineering
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    • v.10 no.3
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    • pp.413-421
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    • 2005
  • As the population of HDTV is growing, among many useful features of modern set top boxes (STBs) or digital video recorders (DVRs), video browsing, visual bookmark, and picture-in-picture capabilities are very frequently required. These features typically employ reduced-size versions of video frames, or thumbnail images. Most thumbnail generation approaches generate DC images directly from a compressed video stream. A discrete cosine transform (DCT) coefficient for which the frequency is zero in both dimensions in a compressed block is called a DC coefficient and is simply used to construct a DC image. If a block has been encoded with field DCT, a few AC coefficients are needed to generate the DC image in addition to a DC coefficient. However, the bit length of a codeword coded with variable length coding (VLC) cannot be determined until the previous VLC codeword has been decoded, thus it is required that all codewords should be fully decoded regardless of their necessary for DC image generation. In this paper, we propose a method especially for fast DC image generation from an I-frame using multiple-symbol lookup table (mLUT). The experimental results show that the method using the mLUT improves the performance greatly by reducing LUT count by 50$\%$.

Joint Optimization of the Motion Estimation Module and the Up/Down Scaler in Transcoders television (트랜스코더의 해상도 변환 모듈과 움직임 추정 모듈의 공동 최적화)

  • Han, Jong-Ki;Kwak, Sang-Min;Jun, Dong-San;Kim, Jae-Gon
    • Journal of Broadcast Engineering
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    • v.10 no.3
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    • pp.270-285
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    • 2005
  • A joint design scheme is proposed to optimize the up/down scaler and the motion vector estimation module in the transcoder system. The proposed scheme first optimizes the resolution scaler for a fixed motion vector, and then a new motion vector is estimated for the fixed scaler. These two steps are iteratively repeated until they reach a local optimum solution. In the optimization of the scaler, we derive an adaptive version of a cubic convolution interpolator to enlarge or reduce digital images by arbitrary scaling factors. The adaptation is performed at each macroblock of an image. In order to estimate the optimal motion vector, a temporary motion vector is composed from the given motion vectors. Then the motion vector is refined over a narrow search range. It is well-known that this refinement scheme provides the comparable performance compared to the full search method. Simulation results show that a jointly optimized system based on the proposed algorithms outperforms the conventional systems. We can also see that the algorithms exhibit significant improvement in the minimization of information loss compared with other techniques.

An Intra Prediction Method and Fast Intra Prediction Method in Inter Frames using Block Content and Dependency Probabilities on neighboring Block Modes in H.264|AVC (영상 내용 특성과 주위 블록 모드 상관성을 이용한 H.264|AVC 화면 간 프레임에서의 화면 내 예측 부호화 결정 방법과 화면 내 예측 고속화 방법)

  • Na, Tae-Young;Lee, Bum-Shik;Hahm, Sang-Jin;Park, Chang-Seob;Park, Keun-Soo;Kim, Mun-Churl
    • Journal of Broadcast Engineering
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    • v.12 no.6
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    • pp.611-623
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    • 2007
  • The H.264|AVC standard incorporates an intra prediction tool into inter frame coding. However, this leads to excessive amount of increase in encoding time, thus resulting in the difficulty in real-time implementation of software encoders. In this paper, we first propose an early decision on intra prediction coding and a fast intra prediction method using the characteristics of block contents and the context of neighboring block modes for the intra prediction in the inter frame coding of H.264/AVC. Basically, the proposed methods determine a skip condition on whether the $4{\times}4$ intra prediction is to be used in the inter frame coding by considering the content characteristics of each block to be encoded and the context of its neighboring blocks. The performance of our proposed methods is compared with the Joint Model reference software version 11.0 of H.264|AVC. The experimental results show that our proposed methods allow for 41.63% reduction in the total encoding time with negligible amounts of PSNR drops and bitrate increases, compared to the original Joint Model reference software version 11.0.

A Two-Step Call Admission Control Scheme using Priority Queue in Cellular Networks (셀룰러 이동망에서의 우선순위 큐 기반의 2단계 호 수락 제어 기법)

  • 김명일;김성조
    • Journal of KIISE:Information Networking
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    • v.30 no.4
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    • pp.461-473
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    • 2003
  • Multimedia applications are much more sensitive to QoS(Quality of Service) than text based ones due to their data continuity. In order to provide a fast moving MH(Mobil Host) using multimedia application with a consistent QoS,an efficient call admission mechanism is in need. This paper proposes the 2SCA(2-Step Call Admission) scheme based on cal admission scheme using pripority to guarantee the consistent QoS for mobile multimedia applications. A calls of MH are classified new calls, hand-off calls, and QoS upgrading calls. The 2SCA is composed of the basic call admission and advanced call admission; the former determines the call admission based on bandwidth available in each cell and the latter determines the call admission by applying DTT(Delay Tolerance Time), PQeueu(Priority Queue), and UpQueue(Upgrade Queue) algorithm according to the type of each call blocked at the basic call admission stage. In order to evaluate the performance of our mechanism, we measure the metrics such as the dropping probability of new calls, dropping probability of hand-off calls, and bandwidth utilization. The result shows that the performance of our mechanism is superior to that of existing mechanisms such as CSP(Complete Sharing Policy), GCP(Guard Channel Policy) and AGCP(Adaptive Guard Channel Policy).

Design and Evaluation of a NIC-Driven Host-Independent Network System (네트워크 인터페이스 카드에 기반한 호스트 독립적인 네트워크 시스템의 설계 및 성능평가)

  • Yim Keun Soo;Cha Hojung;Koh Kern
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.11
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    • pp.626-634
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    • 2004
  • In a client-server model, network server systems suffer from both heavy communication and computational loads. While communication channels become increasingly speedy, the existing protocol stack architectures still include mainly three performance bottlenecks of protocol stack processing, system call, and network interrupt overheads. To address these obstacles, in this paper we present a host-independent network system where a network interface card (NIC) is utilized in an efficient manner. First, by offloading network-related portion to the NIC, the host can fully utilize its processing power for other useful purposes. Second, it eliminates the system call overhead, such as context-switching and memory copy operations, since the host communicates with the NIC through its user-level libraries. Third, it a] so reduces the network interrupt operation count as the host handles the interrupt in a segment instead of a packet. The experimental results show that the proposed network system reduces the host CPU overhead for communication system by 68-71%. It also shows that the proposed system improves the communication speed by 11-83% under heavy computational and communication load conditions.

AMSEA: Advanced Multi-level Successive Elimination Algorithms for Motion Estimation (움직임 추정을 위한 개선된 다단계 연속 제거 알고리즘)

  • Jung, Soo-Mok;Park, Myong-Soon
    • Journal of KIISE:Software and Applications
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    • v.29 no.1_2
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    • pp.98-113
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    • 2002
  • In this paper, we present advanced algorithms to reduce the computations of block matching algorithms for motion estimation in video coding. Advanced multi-level successive elimination algorithms(AMSEA) are based on the Multi-level successive elimination algorithm(MSEA)[1]. The first algorithm is that when we calculate the sum of absolute difference (SAD) between the sum norms of sub-blocks in MSEA, we use the partial distortion elimination technique. By using the first algorithm, we can reduce the computations of MSEA further. In the second algorithm, we calculate SAD adaptively from large value to small value according to the absolute difference values between pixels of blocks. By using the second algorithm, the partial distortion elimination in SAD calculation can occur early. So, the computations of MSEA can be reduced. In the third algorithm, we can estimate the elimination level of MSEA. Accordingly, the computations of the MSEA related to the level lower than the estimated level can be reduced. The fourth algorithm is a very fast block matching algorithm with nearly 100% motion estimation accuracy. Experimental results show that AMSEA are very efficient algorithms for the estimation of motion vectors.

A LAN Protocol Analyzer including Simulation Function for PC Environment (PC 환경에서 시뮬레이션 기능을 포함한 LAN 프로토콜 분석장비)

  • Chung, Joong-Soo;Lee, Jun-Won
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.5
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    • pp.583-589
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    • 2002
  • The Internet is absolutely contributed to information telecommunication revolution nowadays. Realizing local network at the various type of buildings such as a company and a university, ethernet is used for subnet and FDDI, ATM are used for backbone mainly in order to get internet services. Processing TCP/IP protocol suite and analyzing the protocol exactly is essential to detecting the problem occurring in the network and developing communication equipment. This paper presents implementation of ethernet LAN protocol analyser which monitors and simulates ICP/IP protocol suite carrying the Internet and non-Internet protocol such as Netware and NetBIOS. MS window98 and visual C are used for development environment and application program operates on the NDIS firmware. The performance analysis on the proposed system is carried out as monitoring and simulating the traffic over LAN of a university. In the result of monitoring the system, the processing time of a packet captured over the LAN is about 1.5ms. In case of simulating the system, the processing time to be taken carrying out TCP connection and disconnection once is packet is about 8.6ms. The performance analysis of monitoring and simulation results satisfies with 10 Mbps ethernet LAN environment.

Design of Low Voltage 1.8V, Wide Range 50∼500MHz Delay Locked Loop for DDR SDRAM (DDR SDRAM을 위한 저전압 1.8V 광대역 50∼500MHz Delay Locked Loop의 설계)

  • Koo, In-Jae;Chung, Kang-Min
    • The KIPS Transactions:PartA
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    • v.10A no.3
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    • pp.247-254
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    • 2003
  • This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

Loss Properties of Nano-crystalline Alloy coated as a Resistive Layer (표면 저항층 형성에 의한 나노결정 합금재료의 손실 특성)

  • Kim, Hyun-Sik;Kim, Jong-Ryung;Lee, Geene;Lee, Hae-Yeon;Huh, Jung-Sub;Oh, Young-Woo;Byun, Woo-Bong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.229-229
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    • 2007
  • 나노결정 합금재료를 전력선 통신 커플러용 자심재료로 응용하기 위해서는 고주파 대역에서의 손실 특성이 제어되어야 한다. 즉 고속 전력선 통신을 위한 자심재료의 투자율 및 완화 주파수 등의 전자기적 특성은 30MHz까지 우수하고 안정적으로 유지되어야 하며, 높은 투자율 및 자속밀도, 공진주파수뿐만 아니라 낮은 전력손실 값을 가져야 한다. 따라서 본 연구에서는 나노결점 합금 리본 표면에 딥 코팅, 졸-겔법, 진공함침 등의 방법을 이용하여 PZT, $TiO_2$$SiO_2$ 등의 산화물 고저항층을 형성시켜 자기적 성질을 유지하면서 고주파 대역의 와전류 손실을 감소시켜 통신용 자심재료로의 응용성을 향상시키고자 하였다. PZT 슬러리의 제타전위 조절을 통해 최적의 분산조건을 얻을 수 있었고, 평균 150nm인 PZT 입자의 초미립자와 가소제, 분산제, 결합제의 첨가조건을 확립할 수 있었다. 딥-코팅은 슬러리 내 유지시간 10초, 인상속도 5mm/min로 30회 반복되었을 때 가정 우수한 특성을 나타내었으며, 고주파 대역에서의 손실 감소효과를 나타내었다. 그리고 졸-겔법에 의해 제조된 슬러리를 이용한 $TiO_2$$SiO_2$ 산화물 저항층 코팅을 통해 금속 알콕사이드의 혼합조건 및 저항층 형성용 슬러리의 제조조건을 확립하였고, 합금 리본표면에 균일하고 우수한 점착력을 가지는 저항층을 형성시킬 수 있었으며, 이에 따른 코어손실의 감소효과를 나타낼 수 있었다. 또한 진공 함침법을 통한 저항층 형성에서, $TiO_2$ 나노분말을 표면 저항층으로 코팅했을 때, 가장 높은 코어손실 감소효과를 나타내었다. 한편, 표면 저항층이 형성된 나노결정 합금으로 제조한 자심재료를 이용하여 전력선 통신용 비접촉식 커플러에의 적용과 시험을 통해 고주파 손실 감소효과에 의한 신호전송 특성과 전류특성을 향상시킬 수 있었다.

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