• Title/Summary/Keyword: 고속 영상화

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Design of Video Pre-processing Algorithm for High-speed Processing of Maritime Object Detection System and Deep Learning based Integrated System (해상 객체 검출 고속 처리를 위한 영상 전처리 알고리즘 설계와 딥러닝 기반의 통합 시스템)

  • Song, Hyun-hak;Lee, Hyo-chan;Lee, Sung-ju;Jeon, Ho-seok;Im, Tae-ho
    • Journal of Internet Computing and Services
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    • v.21 no.4
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    • pp.117-126
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    • 2020
  • A maritime object detection system is an intelligent assistance system to maritime autonomous surface ship(MASS). It detects automatically floating debris, which has a clash risk with objects in the surrounding water and used to be checked by a captain with a naked eye, at a similar level of accuracy to the human check method. It is used to detect objects around a ship. In the past, they were detected with information gathered from radars or sonar devices. With the development of artificial intelligence technology, intelligent CCTV installed in a ship are used to detect various types of floating debris on the course of sailing. If the speed of processing video data slows down due to the various requirements and complexity of MASS, however, there is no guarantee for safety as well as smooth service support. Trying to solve this issue, this study conducted research on the minimization of computation volumes for video data and the increased speed of data processing to detect maritime objects. Unlike previous studies that used the Hough transform algorithm to find the horizon and secure the areas of interest for the concerned objects, the present study proposed a new method of optimizing a binarization algorithm and finding areas whose locations were similar to actual objects in order to improve the speed. A maritime object detection system was materialized based on deep learning CNN to demonstrate the usefulness of the proposed method and assess the performance of the algorithm. The proposed algorithm performed at a speed that was 4 times faster than the old method while keeping the detection accuracy of the old method.

Design and Implementation of Digital Electrical Impedance Tomography System (디지털 임피던스 영상 시스템의 설계 및 구현)

  • 오동인;백상민;이재상;우응제
    • Journal of Biomedical Engineering Research
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    • v.25 no.4
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    • pp.269-275
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    • 2004
  • Different biological tissues have different values of electrical resistivity. In EIT (electrical impedance tomography), we try to provide cross-sectional images of a resistivity distribution inside an electrically conducting subject such as the human body mainly for functional imaging. However, it is well known that the image reconstruction problem in EIT is ill-posed and the quality of a reconstructed image highly depends on the measurement error. This requires us to develop a high-performance EIT system. In this paper, we describe the development of a 16-channel digital EIT system including a single constant current source, 16 voltmeters, main controller, and PC. The system was designed and implemented using the FPGA-based digital technology. The current source injects 50KHz sinusoidal current with the THD (total harmonic distortion) of 0.0029% and amplitude stability of 0.022%. The single current source and switching circuit reduce the measurement error associated with imperfect matching of multiple current sources at the expense of a reduced data acquisition time. The digital voltmeter measuring the induced boundary voltage consists of a differential amplifier, ADC, and FPGA (field programmable gate array). The digital phase-sensitive demodulation technique was implemented in the voltmeter to maximize the SNR (signal-to-noise ratio). Experimental results of 16-channel digital voltmeters showed the SNR of 90dB. We used the developed EIT system to reconstruct resistivity images of a saline phantom containing banana objects. Based on the results, we suggest future improvements for a 64-channel muff-frequency EIT system for three-dimensional dynamic imaging of bio-impedance distributions inside the human body.

Eliminating Color Mixing of Projector-Camera System for Fast Radiometric Compensation (컬러 보정의 고속화를 위한 프로젝터-카메라 시스템의 컬러 혼합 성분 제거)

  • Lee, Moon-Hyun;Park, Han-Hoon;Park, Jong-Il
    • Journal of Broadcast Engineering
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    • v.13 no.6
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    • pp.941-950
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    • 2008
  • The quality of projector output image is influenced by the surrounding conditions such as the shape and color of screen, and environmental light. Therefore, techniques that ensure desirable image quality, regardless of such surrounding conditions, have been in demand and are being steadily developed. Among the techniques, radiometric compensation is a representative one. In general, radiometric compensation is achieved by measuring the color of the screen and environmental light based on an analysis of camera image of projector output image and then adjusting the color of projector input image in a pixel-wise manner. This process is not time-consuming for small sizes of images but the speed of the process drops linearly with respect to image size. In large sizes of images, therefore, reducing the time required for performing the process becomes a critical problem. Therefore, this paper proposes a fast radiometric compensation method. The method uses color filters for eliminating the color mixing between projector and camera because the speed of radiometric compensation depends mainly on measuring color mixing between projector and camera. By using color filters, there is no need to measure the color mixing. Through experiments, the proposed method improved the compensation speed by 44 percent while maintaining the projector output image quality. This method is expected to be a key technique for widespread use of projectors for large-scale and high-quality display.

Image Compression Using DCT Map FSVQ and Single - side Distribution Huffman Tree (DCT 맵 FSVQ와 단방향 분포 허프만 트리를 이용한 영상 압축)

  • Cho, Seong-Hwan
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.10
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    • pp.2615-2628
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    • 1997
  • In this paper, a new codebook design algorithm is proposed. It uses a DCT map based on two-dimensional discrete cosine of transform (2D DCT) and finite state vector quantizer (FSVQ) when the vector quantizer is designed for image transmission. We make the map by dividing input image according to edge quantity, then by the map, the significant features of training image are extracted by using the 2D DCT. A master codebook of FSVQ is generated by partitioning the training set using binary tree based on tree-structure. The state codebook is constructed from the master codebook, and then the index of input image is searched at not master codebook but state codebook. And, because the coding of index is important part for high speed digital transmission, it converts fixed length codes to variable length codes in terms of entropy coding rule. The huffman coding assigns transmission codes to codes of codebook. This paper proposes single-side growing huffman tree to speed up huffman code generation process of huffman tree. Compared with the pairwise nearest neighbor (PNN) and classified VQ (CVQ) algorithm, about Einstein and Bridge image, the new algorithm shows better picture quality with 2.04 dB and 2.48 dB differences as to PNN, 1.75 dB and 0.99 dB differences as to CVQ respectively.

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In-Ga-O 박막에서 Gallium 조성 변화에 의한 박막의 특성변화 연구 및 소자 응용

  • Jo, Gwang-Min;Lee, Jun-Hyeong;Kim, Jeong-Ju;Heo, Yeong-U
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.169.1-169.1
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    • 2015
  • 최근 디스플레이 기술은 급속도로 발전해 가고 있다. 디스플레이 산업의 눈부신 성장에 발맞추어 초고화질, 초고선명, 고속 구동 및 대형화 등을 포함하는 최신 기술의 디스플레이 구동이 필요하다. 이러한 요구사항을 만족하기 위해서는 각 픽셀에 영상정보를 기입하는 충전시간을 급격히 감소시켜야 하고 따라서 픽셀 트랜지스터(TFT)의 이동도는 급격히 증가해야 한다. 따라서 차세대 디스플레이 실현을 위해서 고이동도 특성을 구현 할 수 있는 신물질의 개발이 매우 중요하다. 현재 산화물박막트랜지스터는 차세대 디스플레이 실현을 위해 가장 주목받고 있으며, 실제로 산화물박막 트랜지스터의 핵심소재인 In-Ga-Zn-O(a-IGZO) 산화물의 경우 국내외에서 디스플레이에 적용되어 생산이 시작되고있다. 그러나 a-IGZO 산화물의 경우 이동도가 $5-10cm^2V{\cdot}s$ 수준이어서 향후 개발 되어질 초고해상도/고속구동 디스플레이 실현(이동도 $50cm^2V{\cdot}s$)에는 한계가 있다. 따라서 본 연구에서는 이를 해결 할 수 있는 'post-IGZO' 개발을 위해 In2O3에 Ga2O3를 조성별로 고용시켜 박막의 구조적, 전기적, 광학적 특성 및 TFT를 제작하여 특성 연구를 진행하였다. 조성은 In2O3에 Ga2O3를 7.5%~15% 도핑 하였으며, Sputtering을 이용하여 indium gallium oxide(IGO) 박막을 제작하였다. 박막은 상온 및 $300^{\circ}C$에서 증착 하였으며 증착 된 IGO 박막은 Ga=12.5% 까지는 In2O3에 Ga이 모두 고용되어 cubic In2O3 poly crystalline을 나타내는 것을 확인하였으며 Ga=15%에서 Gallium 관련 2차상이 확인되었다. Ga양이 변화함에 따라 박막의 전기적 특성이 조절 가능하였으며 이를 이용하여 IGO 박막을 30 nm 두께로 증착 하여 IGO 박막을 channel layer로 사용하는 bottom gate structured TFTs를 제작 하였다. IGO TFTs는 Ga=10%에서 on/off ratio ${\sim}10^8$, 그리고 field-effect mobility $84.8cm^2/V{\cdot}S$를 나타내며 초고화질, 초고선명 차세대 디스플레이 적용 가능성을 보여 준다.

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Design and Implementation of ARIA Cryptic Algorithm (ARIA 암호 알고리듬의 하드웨어 설계 및 구현)

  • Park Jinsub;Yun Yeonsang;Kim Young-Dae;Yang Sangwoon;Chang Taejoo;You Younggap
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.4 s.334
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    • pp.29-36
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    • 2005
  • This paper presents the first hardware design of ARIA that KSA(Korea Standards Association) decided as the block encryption standard at Dec. 2004. The ARIA cryptographic algorithm has an efficient involution SPN (Substitution Permutation Network) and is immune to known attacks. The proposed ARIA design based on 1 cycle/round include a dual port ROM to reduce a size of circuit md a high speed round key generator with barrel rotator. ARIA design proposed is implemented with Xilinx VirtexE-1600 FPGA. Throughput is 437 Mbps using 1,491 slices and 16 RAM blocks. To demonstrate the ARIA system operation, we developed a security system cyphering video data of communication though Internet. ARIA addresses applications with high-throughput like data storage and internet security protocol (IPSec and TLS) as well as IC cards.

Down Sampling for Fast Rough Mode Decision for a Hardware-based HEVC Intra-frame encoder (하드웨어 기반 HEVC 인트라 인코더에서 다운 샘플링을 사용한 고속 Rough Mode Decision)

  • Jang, Ji Hun;Rhee, Chae Eun
    • Journal of Broadcast Engineering
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    • v.21 no.3
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    • pp.341-348
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    • 2016
  • HEVC is the next compression standard and is expected to be used widely replacing the conventional H.264/AVC standard. The compression ratio of the HEVC is twice times than H.264/AVC, whereas its computational complexity is increased by up to 40%. Many research efforts have been made to reduce the computational complexity and to speed up encoding. For intra coding, the rough mode decision (RMD) is commonly applied. The rate-distortion optimization (RDO) process to decide the best mode is too complex so that RMD chooses the candidate modes with a simple process and sends the candidates to RDO process. However, for large-size blocks, the RMD also requires considerable computations. In this paper, a down-sampling scheme is proposed for the RMD process. The reference pixel loading, predicted pixel generation are performed using the down-sampled pixel data. When the proposed scheme is applied to the RMD, the computational complexity is reduced by 70% with a marginal bitrate increase of 0.04%. In terms of area of hardware-based RMD, the gate count and the buffer size is reduced 33% and 66%, respectively.

Hardware Design for JBIG2 Huffman Coder (JBIG2 허프만 부호화기의 하드웨어 설계)

  • Park, Kyung-Jun;Ko, Hyung-Hwa
    • Journal of Korea Multimedia Society
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    • v.12 no.2
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    • pp.200-208
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    • 2009
  • JBIG2, as the next generation standard for binary image compression, must be designed in hardware modules for the JBIG2 FAX to be implemented in an embedded equipment. This paper proposes a hardware module of the high-speed Huffman coder for JBIG2. The Huffman coder of JBIG2 uses selectively 15 Huffman tables. As the Huffman coder is designed to use minimal data and have an efficient memory usage, high speed processing is possible. The designed Huffman coder is ported to Virtex-4 FPGA and co-operating with a software modules on the embedded development board using Microblaze core. The designed IP was successfully verified using the simulation function test and hardware-software co-operating test. Experimental results shows the processing time is 10 times faster than that of software only on embedded system, because of hardware design using an efficient memory usage.

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Design of a CHANCE Protocol for the ATM-Based Home Networking (ATM 기반 댁내 통신을 위한 CHANCE 프로토콜의 설계)

  • Hwang, Min-Tae;Kim, Jang-Gyeong
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.1
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    • pp.182-192
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    • 1999
  • The advance of the MPEG(Moving Picture Expert Group) and DSP(Digital Signal Processing) technologies lead the energence of the information appliances which are gradually digitalized and embedded the high-speed networking function. This paper proposes a CHANCE(Cost-effective Home ATM Network for the Consumer Electronics) protocol supporting the ATM-based high-speed networking between the information appliances within the home, and designs its specific functions including the network management and signalling function. The CHANCE protocol is basically based on the tree topology, and supports the plug-and-play function by using only the header field of the ATM cells. Unlike the existing ATM Warren protocol which uses the source routed addressing scheme to control the in-home devices from the Warren controller, the CHANCE protocol can support the inter-device controls as well as the controls from the CHANCE controller by using the switch and device identifier.

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A Center Biased Cross-Diamond Search Algorithm for Fast Fractional-pel Motion Estimation (고속 부화소 움직임 추정을 위한 중심 지향적 십자 다이아몬드 탐색 알고리즘)

  • Jo, Seong-Hyeon;Lee, Jong-Hwa
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.78-84
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    • 2009
  • In general video coding systems, motion estimation (ME) is regarded as a vital component in a video coder as it consumes a large amount of computation resources. Fractional pixel motion estimation can improve the video compression rate at the cost of higher computational complexity. It is based on the experimental results that the sum of absolute differences (SAD) shows parabolic shape and thus can be approximated by using interpolation technique. In this paper, we propose a fast fractional pixel search algorithm by combining SASR (Simplified Adaptive Search Range) and the CBCDS (Center Biased Cross-Diamond Search) pattern with the predicted motion vector. Compare with the fractional pel full search and the CBFPS, the proposed CBCDS algorithms can reduce fractional pel search points up to 81.4%, respectively with the PSNR lost about 0.05dB.