• Proceedings of the Korea Society for Simulation Conference
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• 1998.10a
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• pp.151-155
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• 1998

플랫폼 독립형 클래스 저장소(PICR : Platform Independent Class Repository)에 저장되어 있는 컴포넌트를 망관리 시스템의 분삭객체로 아웃소싱하여 사용하는 Farming 방법론을 실제 TMN 에이전트의 구축에 적용하였을 때 나타나는 결과를 ATM과 같은 고속망을 DCN(Data Communication Network)으로 하는 경우에 대하여 성능평가를 하였다.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.36 no.3
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• pp.339-346
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• 2012

The pre-evaluation of the current-collection performance is an important issue for high-speed railway vehicles. In this paper, using flexible multibody dynamic analysis techniques, a simulation model of the dynamic interaction between the catenary and pantograph is developed. In the analysis model, the pantograph is modeled as a rigid body, and the catenary wire is developed using the absolute nodal coordinate formulation, which can analyze large deformable parts effectively. Moreover, for the representation of the dynamic interaction between these parts, their relative motions are constrained by a sliding joint. Using this analysis model, the contact force and loss of contact can be calculated for a given vehicle speed. The results are evaluated by EN 50318, which is the international standard with regard to analysis model validation. This analysis model may contribute to the evaluation of high-speed railway vehicles that are under development.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.1656-1664
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• 2007

This paper introduces a study of improvement for a defect diagnosis of the UM71C track circuit using on HSL. The track circuit on HSL has long operation section. Therefore, when the worker maintain, many times and efforts are spent. So, periodically, we have operated a inspection car. However, we don't know exactly the state changed of the inspection data when track circuit has defect. Actually, We fixed a sample area within operation section on HSL and performed the simulations for short circuit current that is reflected characteristic impedance and propagation factor. We compared the measuring data with the result of the simulation. Using verified simulation program, we estimated inspection data as the malfunction number and the change of capacity of compensation capacitor. These study need to secure of the safety as the train operation. Also, It needs to make a criteria of analysis for the maintenance through comparison simulation data and inspection data.

• Journal of the Korea Society for Simulation
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• v.20 no.3
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• pp.79-88
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• 2011

In most existing warships combat simulation system, the tactics of a warship is manipulated by human operators. For this reason, the simulation results are restricted due to the stereotype of human operators. To deal with this, we have employed the genetic algorithm for supporting the evolutionary simulation environment. In which, the tactical decision by human operators is replaced by the human model with a rule-based chromosome for representing tactics so that the population of simulations are created and hundreds of simulation runs are continued on the basis of the genetic algorithm without any human intervention until to find emergent tactics which shows the best performance throughout the simulation. This paper proposes an evolutionary tactics generation methodology for the emergent tactics in many-to-many warship combat simulation. To do this, 3:3 warship combat simulation tests are performed.

• Proceedings of the Korean Society for Rock Mechanics Conference
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• 2007.10a
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• pp.19-36
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• 2007

When the trains runs at a high speed in the tunnel, passengers feel a pain in the ear that fast pressure fluctuation inside the tunnel being delivered with pressure fluctuation inside the passenger car. These phenomena are called "aural discomfort". Aural discomfort increase the passengers' uncomfort so that it is decreased a service level and serious case, it is able to damage the ear of the passenger. therefore aural discomfort must be considered the high-speed railroad tunnel cross-section design. To solve the problem of aural discomfort in a railway tunnel, some countries have standards on aural discomfort. It has been studied that different countries have different standards on aural discomfort. For that reason, the criteria of aural discomfort was reviewed through the standards of Kyungbu HSR line and different countries in this paper. And then Numerical Analysis of the Characteristics with tunnel cross-section change has been used for the selection of the optimum cross-section of Honam. The numerical analysis results were compared to field test results in order to verifying the reliability of the numerical analysis.

• Journal of Korean Society of Steel Construction
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• v.28 no.2
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• pp.65-74
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• 2016

A finite element dynamic simulation is performed to gain an insight about the stiffened blast wall structures subjected to blast loading. The simulation was verified using qualitative and quantitative comparisons for different materials. Based on in-depth examination of blast simulation recordings, dynamic behaviors occurred in the blast wall against the explosion are determined. Subsequent simulation results present that the blast wall made of the high performance steel performs much better in the shock absorption. In this paper, the existing finite element shock analysis using the LS-DYNA program is further extended to study the dynamic response of the stiffened blast wall made of the high-performance steel considering high strain-rate effects. The numerical results for various parameters were verified by comparing different material models with dynamic effects occurred in the stiffened blast wall from the explosive simulation.

• Journal of the Korea Society for Simulation
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• v.15 no.1
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• pp.11-17
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• 2006

This paper shows a case study of designing a PLC logic simulator that was developed to simulate and verify PLC control programs for nuclear plant systems. The nuclear control system requires strict restrictions rather than normal process control system does, as it works with a high-risky and dangerous nuclear plant. One is that it should assure the safeness of the control programs by exploiting severe testing. The other restriction is that the control programs should be executed fast enough such that they could control multi devices concurrently in real-time. To cope with these restrictions, we devised a logic compiler which generates C-code programs from given PLC logic programs. Once the logic program was translated into C-code, the program could be analyzed by conventional software analysis tools and could be used to construct a fast logic simulator after cross-compiling, in fact, that is a kind of compiled-code simulator.

• Journal of the Korea Society for Simulation
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• v.27 no.2
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• pp.83-90
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• 2018

This paper describes the method of hull shape optimization to improve the resistance performance of planing hulls when a reference hull shape and its principal dimensions are given. First, the planing hull of precedent research is adopted as the reference hull and an optimization problem is formulated by defining hull shape parameters. The search space of this research is discretized for computing cost and DPSO(Discrete binary version of Particle Swarm Optimization) method is used to solve the optimization problem. As the result of optimization, the decrease of resistance is confirmed from the comparison between the reference hull's and the modified hull's planing performance from computational results.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.6
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• pp.28-36
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• 1998

We have proposed a new non-inverting SOI buffer circuit for the high speed operation at low supply voltage. The body biases of main MOS devices in the proposed circuit are controlled dynamically via subsidiary MOS device connected efficiently to the body terminal. We showed current derivability of the body controlled devices obtained by device simulation and compared with that of conventional SOI devices. Delay time characteristics of the buffer circuit were analyzed by SPICE simulation and compared with those of conventional SOI CMOS buffer circuits. Delay time reduction of the SOI buffer over conventional SOI CMOS buffer with same area is about 36 % at $V_{S}$=1.2 V and $C_{L}$=2 pF. pF.

• Proceedings of the KSR Conference
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• 2006.11b
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• pp.779-785
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• 2006

This paper introduces a result of internal signal modeling for a defect diagnosis of the UM-71C track circuit using on HSL. Actually, We fixed a sample area within operating section on HSL and performed the simulations for short circuit current that is reflected characteristic impedance and propagation factor. We compared the measuring data with the result of the simulation. These modeling can be used as the basic data for secure of the safety. Also, It need to make a criteria of analysis for the maintenance through comparison simulation data and inspection data.