• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.1
• /
• pp.25-34
• /
• 2012

This paper presents a universal architecture for variable-length eight-parallel Reed-Solomon (RS) decoder for high-rate WPAN systems. The proposed architecture can support not only RS(255,239) code but various shortened RS codes. Moreover, variable-length architecture provides variable low latency for various shortened RS codes and the eight-parallel design also provides high data processing rate. Using 90-$nm$ CMOS standard cell technology, the proposed RS decoder has been synthesized and measured for performance. The proposed RS decoder can provide a maximum 19-$Gbps$ data rate at clock frequency 300 $MHz$.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.2
• /
• pp.25-33
• /
• 2007

In this paper, a fourth-order single-bit delta-sigma modulator is presented and implemented. The loop-filter is composed of both feedback and feedforward paths. Measurement results show that maximum 99dB dynamic range is achievable at a clock rate of 3.2MHz for 20kHz baseband. The proposed modulator has been fabricated in a $0.18{\mu}m$ standard CMOS process.

• Explosives and Blasting
• /
• v.19 no.1
• /
• pp.31-40
• /
• 2001

일반적으로 장공발파(長孔發破) 방법(Long hole blasting method)은 그동안 주로 대규모 채탄막장이나 댐 기초굴착, 광산 등에서 행하여져 왔으나 최근 토목터널에서 시공 효율성 및 경제성을 목적으로 관심이 높아지고 있다. 기존의 터널설계 패턴은 I -Type을 기준으로 3.5~3.8m 천공이며 신공법 적용시 최대 4.Om까지 설계되는 것이 보통이었다. 과거 착암장비는 천공장이 늘어남으로서 슬러지에 의한 천공속도가 저하되어 천공비가 증가하기 때문에 빠른 슬러지 배제가 필요하고 Rod의 휨 현상에 의한 천공오차의 증대를 초래할 수 있는 단점이 있었다. 그러나 최근 장비의 발달로 인하여 천공각도 및 천공장 등을 Computer로 모니터링하여 제어할 수 있어 정밀한 천공이 가능하여 졌고 또한, 고성능 에멀젼계 폭약(Super Emulsion)의 개발로 그동안 극 경암터널에서 에멀젼계 폭약의 단점으로 여겨졌던 비 장약량의 증대와 사압현상의 발생, 굴진효율 저하문제론 극복할 수 있었다. 따라서 본 연구는 현재 건설중인 대상현장을 중심으로 장공 터널발파의 효율성과 경제성을 분석하고 나아가 암질에 따른 새로운 Type별 설계기준을 마련하는 기초자료로서 활용하고자 하였다. 된 연구의 대상현장은 충북 괴산군 영풍면 소재 중부내륙(여주-구미간) 고속도로 제 9공구 이화터널 건설공사현장으로 $\varphi{102mm}$ 무 장약공 Cylinder 4공을 이용한 심발법을 사용하였으며 천공장은 최대 5.0m로 2000년 11일 15일에서 동년 12월 15일까지 31일간 총 112회의 시험발파를 실시하여 평균 92%의 높은 굴진 효율을 기록하였다.

• Journal of KIISE:Information Networking
• /
• v.32 no.1
• /
• pp.60-67
• /
• 2005

A cluster consists of a collection of interconnected stand-alone computers working together and provides a high-availability solution in application area such as web services or information systems. Content-based load distribution for web server clusters uses the detailed data found in the application layer to intelligently route user requests among web servers. In this paper, we propose a content-based load distribution algorithm that considers cache hit and load information of the web servers under the web server clusters. In addition, we expand this algorithm in order to manage user requests for dynamic file. Specially, our algorithm does not keep track of any frequency of access information or try to model the contents of the caches of the web servers.

• Journal of KIISE:Computing Practices and Letters
• /
• v.8 no.6
• /
• pp.639-646
• /
• 2002

In this paper, we discuss the system configuration and the design issues of CATS-i, a set of installation and administration tools for Linux cluster systems. CATS-i enables users to manage cluster systems easily, quickly, and safety. It integrates many functions, ranging from installing operating systems and applications to real-time monitoring and management of various important resources. In addition, batch job submission and management are included. These functions support a single system image. Finally, a powerful graphic user interface based on Java lets users quickly understand the cluster status and conveniently use the CATS-i on the Web.

• Journal of Broadcast Engineering
• /
• v.18 no.5
• /
• pp.669-679
• /
• 2013

This paper proposed a new VLSI (Very Large Scale Integrated Circuit) architecture for stereo matching in real time. We minimized the amount of calculation and the number of memory accesses through analyzing calculation of stereo matching. From this, we proposed a new stereo matching calculating cell and a new hardware architecture by expanding it in parallel, which concurrently calculates cost function for all pixels in a search range. After expanding it, we proposed a new hardware architecture to calculate cost function for 2-dimensional region. The implemented hardware can be operated with minimum 250Mhz clock frequence in FPGA (Field Programmable Gate Array) environment, and has the performance of 805fps in case of the search range of 64 pixels and the image size of $640{\times}480$.

• Journal of KIISE
• /
• v.42 no.12
• /
• pp.1467-1473
• /
• 2015

In this paper, we implemented a parallel random number generation program on GPU's, which are known for high performance computing, using LCG (Linear Congruential Generator). Random numbers are important in all fields requiring the use of randomness, and LCG is one of the most widely used methods for the generation of pseudo-random numbers. We explained the parallel program using the NVIDIA CUDA model and MPI(Message Passing Interface) and showed uniform distribution and performance results. We also used a Monte Carlo algorithm to calculate pi(${\pi}$) comparing the parallel random number generator with cuRAND, which is a CUDA library function, and showed that our program is much more efficient. Finally we compared performance results using multi-GPU's with those of ideal speedups.

• Journal of KIISE:Computer Systems and Theory
• /
• v.33 no.5
• /
• pp.297-305
• /
• 2006

Trace-driven simulation is widely used for measuring the performance of a microprocessor in its initial design phase. However, since it requires much time and disk space, the statistical simulation has been studied as an alternative method. In this paper, statistical simulations are performed for a high performance superscalar microprocessor with a perceptron-based multiple branch predictor. For the verification, various hardware configurations are simulated using SPEC2000 benchmarks programs as input. As a result, we show that the statistical simulation is quite accurate and time saving for the evaluation of microprocessor architectures with multiple branch prediction.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.05a
• /
• pp.50-56
• /
• 2002

When the plasma panel is used as a display, frequent discharging are made to occur by alternatively charging each side of the panel to a critical voltage, which causes repeated gas discharges to occur. In this paper, an efficient sustain driver is proposed to achieve a faster rise-time in order to be suitable to widely used ADS driving method. The proposed circuit increases an operational margin up to 20 % compared with conventional approaches improving the recovery efficiency regardless of the variation of panel capacitance. Thanks to the increased operational margin, the brightness decrease problem can be solved without a limitation to sustain pulse width. The principle of operation, and features are illustrated, and verified on a 7.5 inch diagonal panel at 200 kHz operating frequency - based on experimental prototype.

• Journal of Broadcast Engineering
• /
• v.24 no.6
• /
• pp.1064-1071
• /
• 2019

Multiview stereo matching algorithm is used to reconstruct 3D shape from a set of 2D images. Conventional multiview stereo algorithms have been implemented on high-performance hardware due to the heavy complexity that contains a large number of calculations in each step. However, as the performance of mobile graphics processors has recently increased rapidly, complex computer vision algorithms can now be implemented on mobile devices like a smartphone and an embedded board. In this paper we parallelize an multiview stereo algorithm using OpenCL on mobile GPU and provide various optimization techniques on the embedded hardware with limited resource.