• Title/Summary/Keyword: 계측증폭기

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A Design of Low-Power Wideband Bipolar Current Conveyor (CCII) and Its Application to Universal Instrumentation Amplifiers (저전력 광대역 바이폴라 전류 콘베이어(CCII)와 이를 이용한 유니버셜 계측 증폭기의 설계)

    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.5
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    • pp.143-152
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    • 2004
  • A novel low-power wideband bipolar second-generation current conveyors(CCIIs) and its application to universal instrumentation amplifier(UIA) were proposed. The CCII for accuracy voltage or current transfer characteristics and low current input impedance adopted adaptive current bias circuit into conventional class Ab CCII. The UIA consists of only two CCIIs and four resistors. Three instrumentation function of the UIA can be realized by selection of input signals and resistors. The simulation results show that the CCII has input impedance of 2.0$\Omega$ and the voltage gain of 60㏈ for frequency range from 0 to 50KHz when used as a voltage amplifier. The CCII has also good characteristics of current follower for current range from -100㎃ to +100㎃. The simulation results show that the UIA has three instrumentation amplifier functions without resistor matching. The UIA has the voltage gain of 40㏈ for frequency range from 0 to 100KHz when used as a fully-differential instrumentation amplifier. The power dissipations of the CCII and the UIA are 0.75㎽ and 1.5㎽ at supply voltage of $\pm$2.5V, respectively.

A Design of Digital Instrumentation Amplifier converting standard sensor output signals into 5V voltage-output (표준 센서 출력신호를 5V 전압-출력을 변환하는 디지털 계측 증폭기 설계)

  • Cha, Hyeong-Woo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.11
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    • pp.41-47
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    • 2011
  • A novel digital instrumentation amplifier(DIA) converting universal signal inputs into 5V voltage-output for industry standard sensor signal processing was designed. The circuit consists of a commercial instrumentation amplifier, seven analog switches, two voltage references of 1.0V and -10.0V, and four resistors. The converting principle is the circuit reconstruction by switches for resistor values and reference voltages according to input signals. The simulation result shows that the DIA has a good output voltage characteristics of 0~5V for the input voltage of 0V~5V, 1V~5V, -10V~+10V, and 4mA~20mA. The nonlinearity error was less than 0.1% for the four type signal inputs.

고속펄스용 트랜지스터 직선증폭기의 설계 및 실험결과

  • 정만영
    • 전기의세계
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    • v.12
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    • pp.24-29
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    • 1963
  • 펄스증폭기로는 radar를 비롯하여 T.V., 전자설계기 등에 광범위하게 이용되고 있는 한편 원자력의 연구 및 그의 응용부분에 있어서도 상당히 이용되고 있다. 여기서는 방사선계측장치중에서 없어서는 안될 펄스증폭기의 설계와 이에 관련된 사항에 관하여 고찰하였다.

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애널로그 및 디지탈계측의 기초개념과 응용(I)

  • 고명삼
    • Journal of the KSME
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    • v.25 no.2
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    • pp.130-136
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    • 1985
  • 확정적 계측신호에 극한시키며 현장 혹은 연구실에 종사하고 있는 기계기술자에게 필요로 하는 애널로그계측과 디지틀계측의 특성과 계측시스템의 구성, 연산증폭기(Op. Amp)의 원리 및 응용, 측정신호의 선형화, 마이크로 프로세서의 원리 A/D, D/A 변환기의 원리 및 응용, 자료처리시 스템, 센서의 원리 및 응용, 디지틀계측시스템의 최근동향등 메카트로닉스시대에서 요청되는 계 측공학의 주요과제에 대하여 기술한다.

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Satellite Battery Cell Voltage Monitor System Using a Conventional Differential Amplifier (종래의 차동증폭기를 사용한 인공위성 배터리 셀 전압 감시 시스템)

  • Koo, Ja-Chun;Choi, Jae-Dong;Choi, Seong-Bong
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.33 no.2
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    • pp.113-118
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    • 2005
  • This paper shows a satellite battery cell voltage monitor system to make differential voltage measurements when one or both measurement points are beyond voltage range allowed by a conventional differential amplifier. This system is particularly useful for monitoring the individual cell voltage of series-connected cells that constitute a rechargeable satellite battery in which some cell voltages must be measured in the presence of high common mode voltage.

Design of 0.5V Electro-cardiography (전원전압 0.5V에서 동작하는 심전도계)

  • Sung, Min-Hyuk;Kim, Jea-Duck;Choi, Seong-Yeol;Kim, Yeong-Seuk
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.7
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    • pp.1303-1310
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    • 2016
  • In this paper, electrocardiogram (ECG) analog front end with supply voltage of 0.5V has been designed and verified by measurements of fabricated chip. ECG is composed of instrument amplifier, 6th order gm-C low pass filter and variable gain amplifier. The instrument amplifier is designed to have gain of 34.8dB and the 6th order gm-C low pass filter is designed to obtain the cutoff frequency of 400Hz. The operational transconductance amplifier of the low pass filter utilizes body-driven differential input stage for low voltage operation. The variable gain amplifier is designed to have gain of 6.1~26.4dB. The electrocardiogram analog front end are fabricated in TSMC $0.18{\mu}m$ CMOS process with chip size of $858{\mu}m{\times}580{\mu}m$. Measurements of the fabricated chip is done not to saturate the gain of ECG by changing the external resistor and measured gain of 28.7dB and cutoff frequency of 0.5 - 630Hz are obtained using the supply voltage of 0.5V.

A System on the Gain Stability of Negative Feedback Pulse Linear Amplifier (부귀환펄스선형증폭기의 이득 안정도에 관한 연구)

  • 이병선
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.10 no.5
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    • pp.7-15
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    • 1973
  • The gain stability of the nuclear pulse ampifiers with negative feedback for such a fast pulse input as the step voltge or the nuclear radiation detector pulse is analyzed in detail and the experimental results are given. It is shown that a few risetime should elapse to get the full effect of the negative feedback upon the liearity and the stability of the amplifiers for the fast pulse input, and to reduce this limitation the risetime of the negative feedback amplifier must be designed to be short compared with the width of the input pulse.

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Implementation of an analog front-end for electroencephalogram signal processing (뇌전도 신호 처리용 아날로그 전단부 구현)

  • Kim, Min-Chul;Shim, Jae Hoon
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.5
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    • pp.15-18
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    • 2013
  • This paper presents an analog front-end for electroencephalogram(EEG) signal processing. Since EEG signals are typically weak and located at very low frequencies, it is imperative to implement an amplifier with high gain, high common-mode rejection ratio(CMRR) and good noise immunity at very low frequencies. The analog front-end of this paper consists of a programmable-gain instrumentation amplifier and a band-pass filter. A frequency chopping technique is employed to remove the low-frequency noise. The circuits were fabricated in 0.18um CMOS technology and measurements showed that the analog front-end has the maximum gain of 60dB and >100dB CMRR over the programmable gain range.

Sinusoidal A Study on the gain Stability of the Feedback Linear Pulse Amplifiers for Fast Pulse Input (금속펄스 선형증폭기의 빠른 입력펄스에 대한 이득안정도에 관한 연구)

  • 이병선
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.3
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    • pp.1-14
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    • 1974
  • The gain stability of the nuclear pulse linear amplifiers with feedback for such a fast pulse input as the step voltage or the nuclear radiation detector pulse is analysed in detail. The expression is derived which describes the waveform at the anode circuit of the photomultiplier tube which is a part of the nuclear radiation detector. It is analysed and compared when the feedback amplifier has one and two time-constants. When these fast input pulse voltages are applied to the feedback amplifier, the effects of feedback in linearity and stability of the output voltage appear only after two or three rise-times of the amplifier, And it is proved that in order to reduce this limitation, the rise time of the feedback amplifier shou1d be less than the input pulse width. It is also shown that the above theory can be applied directly to the voltage-shunt feedback amplifier stages designed as the basic amplifier of the linear amplifier, and that the gain stability is more improved for the smaller input impedance of this amplifier stage.

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Analog Front-End Circuit Design for Bio-Potential Measurement (생체신호 측정을 위한 아날로그 전단 부 회로 설계)

  • Lim, Shin-Il
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.11
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    • pp.130-137
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    • 2013
  • This paper presents analog front-end(AFE) circuits for bio-potential measurement. The proposed AFE is composed of IA(instrument amplifier), BPF(band-pass filter), VGA(variable gain amplifier) and SAR(successive approximation register) type ADC. The low gm(LGM) circuits with current division technique and Miller capacitance with high gain amplifier enable IA to implement on-chip AC-coupling without external passive components. Spilt capacitor array with capacitor division technique and asynchronous control make the 12-b ADC with low power consumption and small die area. The total current consumption of proposed AFE is 6.3uA at 1.8V.