• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.84-95
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• 2006

In H/W implementation for the finite field the use of normal basis has several advantages, especially, the optimal normal basis is the most efficient to H/W implementation in $GF(2^m)$. In this paper, we propose a new, simpler, parallel multiplier over $GF(2^m)$ having a Gaussian normal basis of type k, which performs multiplication over $GF(2^m)$ in the extension field $GF(2^{mk})$ containing a type-I optimal normal basis. For k=2,4,6 the time and area complexity of the proposed multiplier is the same as tha of the best known Reyhani-Masoleh and Hasan multiplier.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.45-58
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• 2006

In H/W implementation for the finite field, the use of normal basis has several advantages, especially, the optimal normal basis is the most efficient to H/W implementation in $GF(2^m)$. In this paper, we propose a new, simpler, parallel multiplier over $GF(2^m)$ having a Gaussian normal basis of type k, which performs multiplication over $GF(2^m)$ in the extension field $GF(2^{mk})$ containing a type-I optimal normal basis. For k=2,4,6 the time and area complexity of the proposed multiplier is the same as tha of the best known Reyhani-Masoleh and Hasan multiplier

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.12C
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• pp.1297-1308
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• 2006

Multiplications in finite fields are one of the most important arithmetic operations for implementations of elliptic curve cryptographic systems. In this paper, we propose a new multiplication algorithm and VLSI architecture over $GF(2^m)$ using Gaussian normal basis. The proposed algorithm is designed by using a symmetric property of normal elements multiplication and transforming coefficients of normal elements. The proposed multiplication algorithm is applicable to all the five recommended fields $GF(2^m)$ for elliptic curve cryptosystems by NIST and IEEE 1363, where $m\in${163, 233, 283, 409, 571}. A new VLSI architecture based on the proposed multiplication algorithm is faster or requires less hardware resources compared with previously proposed normal basis multipliers over $GF(2^m)$. In addition, we gives an easy method finding a basic multiplication matrix of normal elements.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.1
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• pp.41-50
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• 2014

In this paper, we proposed an error detection in Gaussian normal basis multiplier over $GF(2^n)$. It is shown that by using parity prediction, error detection can be very simply constructed in hardware. The hardware overheads are only one AND gate, n+1 XOR gates, and one 1-bit register in serial multipliers, and so n AND gates, 2n-1 XOR gates in parallel multipliers. This method are detect in odd number of bit fault in C = AB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.11C
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• pp.1120-1127
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• 2006

[ $GF(2^m)$ ] for elliptic curve cryptosystem. The proposed multiplier uses Gaussian normal basis representation and produces multiplication results at a rate of one per [m/w] clock cycles, where w is the selected we.4 size. We implement the p.oposed design using Xilinx XC2V1000 FPGA device. Our design has significantly less critical path delay compared with previously proposed hard ware implementations.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.3
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• pp.113-123
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• 2007

This paper presents a high-performance elliptic curve cryptographic processor over $GF(2^m)$. The proposed design adopts Lopez-Dahab Montgomery algorithm for elliptic curve point multiplication and uses Gaussian normal basis for $GF(2^m)$ field arithmetic operations. We select m=163 which is the smallest value among five recommended $GF(2^m)$ field sizes by NIST and it is Gaussian normal basis of type 4. The proposed elliptic curve cryptographic processor consists of host interface, data memory, instruction memory, and control. We implement the proposed design using Xilinx XCV2000E FPGA device. Based on the FPGA implementation results, we can see that our design is 2.6 times faster and requires significantly less hardware resources compared with the previously proposed best hardware implementation.

• The KIPS Transactions:PartC
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• v.15C no.2
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• pp.133-140
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• 2008

In this paper, we propose a high performance elliptic curve cryptographic processor over $GF(2^{163})$. The proposed architecture is based on a modified Lopez-Dahab elliptic curve point multiplication algorithm and uses Gaussian normal basis for $GF(2^{163})$ field arithmetic. To achieve a high throughput rates, we design two new word-level arithmetic units over $GF(2^{163})$ and derive a parallelized elliptic curve point doubling and point addition algorithm with uniform addressing based on the Lopez-Dahab method. We implement our design using Xilinx XC4VLX80 FPGA device which uses 24,263 slices and has a maximum frequency of 143MHz. Our design is roughly 4.8 times faster with 2 times increased hardware complexity compared with the previous hardware implementation proposed by Shu. et. al. Therefore, the proposed elliptic curve cryptographic processor is well suited to elliptic curve cryptosystems requiring high throughput rates such as network processors and web servers.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.2
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• pp.32-38
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• 2012

In this paper, we design on nonliner 3 user Dirty Paper Precoding for MIMO adjacant interference signal cancellation based on 3 GPP LTE Release 10. In this paper, in order to reduce the inter-channel interference at the transmitted side, we propose the Dirty Paper Precoding scheme for 3-user MIMO wireless systems using LQ decomposition and Gram-Schmidt algorithm based in its orthonormal basis.