• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.397-406
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• 2009

A Wireless Access for Vehicular Environment (WAVE) system based on Orthogonal frequency Division Multiplexing (OFDM) is made for vehicle to vehicle wireless communications. The physical layer standard of the WAVE system is very similar to that of the IEEE802.1la wireless local area network (WLAN). Therefore, the performance of the WAVE system is degraded by continual timing delay in the WAVE multipath fading channels after starting initial timing synchronization. In this paper, the tracking algorithm that synchronizes symbol timing is proposed to continually compensate additional timing delay. Computer simulation of the proposed algorithm is performed in the worst communication environments that apply to maximum timing delay. Computer simulation shows that the proposed algorithm can improve the system performance in various channel conditions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.56-65
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• 2006

The Quantum-dot Cellular Automata (QCA) can be considered as a candidate for the next generation digital logic implementation technology due to their small feature sizes and ultra low power consumption. Up to now, several designs using Uh technology have been proposed. However, we found not all of the designs function properly. Furthermore, no general design guidelines have been proposed so far. A straightforward extension of a simple functional design pattern may fail. This makes designing a large scale circuits using QCA technology an extremely time-consuming process. In this paper, we show several critical vulnerabilities related to unbalanced input paths to QCA gates and sneak noise paths in QCA interconnect structures. In order to make up the vulnerabilities, a disciplinary guideline will be proposed. Also, we present a fast adder which has been designed by the discipline, and verified to be functional by the simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.976-987
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• 1998

In this paper, the effect of nonllinear distortion, caused by a high-power amplifier(HPA) in an orthogonal frequency division multiplexing (OFDM) system, on the receiver part is analyzed. Since the HPA, which can be modeled by a memeoryless Volterra system, distorts OFDM signals in a nonlinear fashion, the received signal at each subchannel includes the multiplicative distortion of 1-st order as well as additive nonlinear distortion of high-order. the nonlinear distortion can be viewed as a nonlinear interchannel interference (NICI) since it consists of harmonic distortions and intermodulation distortions, produced by oother subchannels affecting the subchannel of interest. In this paper, we analytically derive the variance of NICI in terms of average input power using the volterra model for HPA, and then calculate the bit-effor rate(BER) performance of an OFDM system. Also, we propose a simple method to compensate for the phase distortion in OFDM system amplified by HPA, OFDM system employing 16-QAM constellation input.

• Journal of the Korea Society for Simulation
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• v.17 no.1
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• pp.17-22
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• 2008

Double-binary turbo code has been adopted as an error control code of various future communication systems including wireless metropolitan area networks(WMAN) due to its powerful error correction capability. One of the components affecting the performance of turbo code is internal interleaver. In 802.16 d/e system, an almost regular permutation(ARP) interleaver has been included as a part of specification, however it seems that the interleaver is not optimized in terms of decoding performance. In this paper, we propose three optimization methods for the interleaver based on spatial distance, spread and minimum distance between original and interleaved sequence. We find optimized interleaving parameters for each optimization method and evaluate the performances of the proposed methods by computer simulation under additive white Gaussian noise(AWGN) channel. Optimized parameters can provide up to 1.0 dB power gain over the conventional method and furthermore the obtainable gain does not require any additional hardware complexity.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.4
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• pp.9-16
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• 2000

This paper shows the performance of a multiuser detection DS-CDMA receiver based on of the hybrid scheme of parallel interference cancellation (PIC) and successive interference cancellation (SIC). The proposed hybrid interference cancellation is presented and is compared with existing PIC, SIC and Hybrid It of other type schemes. The performance criteria used for comparison are complexity, delay and average bit error rate (BER) performance obtained by simulation in Rayleigh-fading channel (Jake's model) with additive white Gaussian noise (AWGN). In the proposed hybrid IC, the BER performance approximates the one of SIC and the delay is half of the SIC. And the number of cancellation of the hybrid It is reduced about a fourth.

• Journal of IKEEE
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• v.9 no.1 s.16
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• pp.1-6
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• 2005

This paper proposes a high performance multiplier using CMOS multiple-valued logic circuits. The multiplier based on the Modified Baugh-Wooley algorithm is designed with current-mode CMOS quaternary logic circuits. The multiplier is functionally partitioned into the following major sections: partial product generator block(binary-quaternary logic conversion block), current-mode quaternary logic full-adder block, and quaternary-binary logic conversion block. The proposed multiplier has 4.5ns of propagation delay and 6.1mW of power consumption. This multiplier can easily adapted to the binary system by the encoder and the decoder. This circuit is designed with 0.35um standard CMOS process at 3.3V supply voltage and 5uA unit current. The validity and effectiveness are verified through the HSPICE simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1833-1839
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• 2014

In this paper, a systematic demapping algorithm for three-dimensional (3-D) lattice signal constellations is presented. The algorithm consists of decision of an octant, computation of a distance from the origin, and determination of the coordinates of a symbol. Since the algorithm can be extended systematically, it is applicable to the larger lattice constellations. To verify the algorithm, 3-D signal transmission systems with field programmable gate array (FPGA) and $Matlab^{(R)}$ are implemented. And they are exploited to carry out computer simulation. As a result, both hardware and software based systems produce almost the same symbol error rates (SERs) in an additive white Gaussian noise (AWGN) environment. In addition, the hardware based system implemented with an FPGA generates waveforms of 3-D signals and recovers the original binary sequences perfectly. Those results confirm that the algorithm and the implemented 3-D transmission system operate correctly.

• Communications for Statistical Applications and Methods
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• v.17 no.3
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• pp.413-421
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• 2010

In this study, we considered bivariate conditional auto-regressive model taking into account spatial association as well as correlation between the two dependent variables, which are the counts of murder and burglary. We conducted likelihood ratio test for checking over-dispersion issues prior to applying spatial poisson models. For the real application, we used the annual counts of violent crimes at 25 districts of Seoul in 2007. The statistical results are visually illustrated by geographical information system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.164-171
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• 2008

Adaptive equalizers are inevitable schemes in digital communication systems for compensating the transmission channel distortion. Additionally, to obtain the required BER(Bit Error Rate), the adaptive algorithms appropriate to the mobile communication channels are required. In this paper, we propose the NPDFE (Noise-Predictive Decision Feedback Equalizer) for communication systems performance improvement in mobile communication channels. The performance of the proposed NPDFE with QPSK (Quadrature Phase Shift Keying) is simulated under AWGN (Additive White Gaussian Noise), Ricean fading, ETSI (European Telecommunications Standards Institute) fading, and Rayleigh fading channels. The equalizers used in simulations are a LE (Linear Equalizer), a DFE (Decision Feedback Equalizer), and a NPDFE. Moreover, the equalizer performance criterion of the QPSK is the BER.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2002.05a
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• pp.179-182
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• 2002

GA(Genetic Algorithm)는 자연계 진화를 모방한 계산 알고리즘으로서 단순하고 응용이 쉽기 때문에 여러 분야에 전역적 최적해 탐색에 많이 사용되고 있다. 최근에는 하드웨어를 구성하는 방법의 하나로서 사용되어 진화하드웨어라는 분야를 탄생시켰다. 이와 함께 GA의 연산자체를 하드웨어로 구현하는 GA processor(GAP)의 필요성도 증가하고 있다. 특히 진화하드웨어를 소프트웨어상에서 진화 시키는 것이 아닌 GAP에 의해 진화 시키는 것은 독립된 구조의 진정한 EHW 설계에 필수적이 될 것이다. 본 논문에서는 GAP 설계 방법을 제안하고 이를 이용하여 진화하드웨어로 State machine을 구현하고자 한다. State machine의 경우 구조상 피드백이 필요하기 때문에 가산기나 멀티플렉서보다는 훨씬 복잡하고 설계가 까다로운 구조이다. 제안된 방법을 통하여 명시적 설계가 어려운 하드웨어 설계에 GAP를 이용한 하드웨어의 진화에 적용함으로써 그 유용성을 보인다.