• Title/Summary/Keyword: 가변 step-size

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Design of on Automotive HID Ballast using Variable Frequency Switching Flyback Converter (가변주파수 스위칭 Flyback 컨버터를 이용한 자동차용 고압방전등 안정기의 설계)

  • Um, Tae-Wook;Kim, Yoon-Ho
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.4
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    • pp.166-171
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    • 2008
  • This paper presents high efficiency control system of automotive 35W electronic ballast for high intensity discharge(HID) lamp using switching flyback converter with variable frequency. Considering performance, size and efficiency of ballast, the flyback converter is designed with planar transformer in converter stage. HID lamp demands a highly efficient ballast and very complex control circuitry that can control complex transient state for applying to automotive. The proposed electronic ballast system is composed of a flyback converter using planar transformer, a full bridge inverter, and a step up igniter. In this system, switching frequency of flyback converter is controlled by varying input voltage of HID ballast and the price and the size of HID ballast using planar transformer can be reduced. The performance and efficiency of the posed system are verified through various the experiment results.

Channel Equalization Techniques for HDTV Systems (HDTV 시스템의 채널등화기법)

  • 원용광;박래홍;박재혁;이병욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.11
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    • pp.2116-2132
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    • 1994
  • In this paper, channel equalization techniques for full-digital HDTV systems are investigated Conventional equalization methods are surveyed and several channel are modeled for computer simulation. A VS-LMS (Variable Step size Least Mean Square) algorithm using the time constant concept is proposed and its performance is compared. Several equalization techniques for HDTV systems are simulated based on various channel models, and their characteristics are analyzed. Also the equalizer using fixed-point operations is simulated and its filter structure suitable for high bit rate transmission is also studied.

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An Adaptive RLR L-Filter for Noise Reduction in Images (영상의 잡음 감소를 위한 적응 RLR L-필터)

  • Kim, Soo-Yang;Bae, Sung-Ha
    • Journal of Korea Multimedia Society
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    • v.12 no.1
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    • pp.26-30
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    • 2009
  • We propose an adaptive Recursive Least Rank(RLR) L-filter which uses an L-estimator in order statistics and is based on rank estimate in robust statistics. The proposed RLR L-filter is a non-linear adaptive filter using non-linear adaptive algorithm and adapts itself to optimal filter in the sense of least dispersion measure of errors with non-homogeneous step size. Therefore the filter may be suitable for applications when the transmission channel is nonlinear channels such as Gaussian noise or impulsive noise, or when the signal is non-stationary such as image signal.

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A Modified Adaptive Switching Median Filter for Image Restoration (영상복원(映像復原)을 위한 변형(變形)된 적응(適應) 스위칭 메디안 필터)

  • Jin, Bo;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.7
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    • pp.1373-1379
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    • 2007
  • A modified adaptive switching median filter for impulse noise removal, which has the noise detection step and the noise filtering step, is proposed in this paper. In the noise detection step, we use the detection threshold which is earned by calculating the intensity differences between pixels nearby with each other in localized window, to determine whether the pixels in the image are noise or not. Then in the noise filtering step, we will only remove the corrupted pixels and remain the good pixels. By the noise detection result, we can easily get the local noise density of the image, and use it to consider the filtering mask size and the times of filtering iteration according to different localized noise corruptions. For Setting the simulation result, we compared the proposed method to conventional median filters with several test images corrupted by various impulse noise densities. We also use the peak signal-to-noise ratio (PSNR) to evaluate restoration performance, the simulation results demonstrate that the proposed method shows better results than other median-based type filters.

Phase Offset Estimation Based on Turbo Decoding in Digital Broadcasting System (차세대 고속무선 DTV를 위한 터보복호기반의 위상 옵셋 추정 기법)

  • Park, Jae-Sung;Cha, Jae-Sang;Lee, Chong-Hoon;Kim, Heung-Mook;Choi, Sung-Woong;Cho, Ju-Phill;Park, Yong-Woon;Kim, Jin-Young
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.9 no.2
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    • pp.111-116
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    • 2009
  • In this paper, we propose a phase offset estimation algorithm which is based on turbo coded digital broadcasting system. The phase estimator is an estimator outside turbo code decoder using LMS (Least Mean Square) algorithm to estimate the phase of next state. While the conventional LMS algorithm with a fixed step size is easy implemented, it has weak points that are difficult the channel estimation and tracking in the multipath environment. To resolve this problem, we propose new phase offset estimation method with a variable step size LMS (VS-LMS). Additionally, we propose a scheme which consists of a conventional LMS. The performance is verified by computer simulation according to a fixed phase offset and a increased phase offset, the proposed algorithm improve the bit error rate performance than the conventional algorithm.

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Digital Control for BUCK-BOOST Type Solar Array Regulator (벅-부스트 형 태양전력 조절기의 디지털 제어)

  • Yang, JeongHwan;Yun, SeokTeak;Park, SeongWoo
    • Journal of Satellite, Information and Communications
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    • v.7 no.3
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    • pp.135-139
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    • 2012
  • A digital controller can simply realize a complex operation algorithm and power control process which can not be applied by an analog circuit for a solar array regulator(SAR). The digital resistive control(DRC) makes an equivalent input impedance of the SAR be resistive characteristic. The resistance of the solar array varies largely in a voltage source region and slightly in a current source region. Therefore when the solar array regulator is controlled by the DRC, the Advanced Incremental Conductance MPPT Algorithm with a Variable Step Size(AIC-MPPT-VSS) is suitable. The AIC-MPPT-VSS, however, using small signal resistance and large signal resistance of the solar array can not limit the absolute value of the solar array power. In this paper, the solar array power limiter is suggested and the BUCK-BOOST type SAR which is fully controlled by the digital controller is verified by simulation.

A Variable-Length FFT/IFFT Processor for Multi-standard OFDM Systems (다중표준 OFDM 시스템용 가변길이 FFT/IFFT 프로세서)

  • Yeem, Chang-Wan;Shin, Kyung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.2A
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    • pp.209-215
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    • 2010
  • This paper describes a design of variable-length FFT/IFFT processor (VL_FCore) for OFDM-based multi-standard communication systems. The VL_FCore adopts in-place single-memory architecture, and uses a hybrid structure of radix-4 and radix-2 DIF algorithms to accommodate various FFT lengths in the range of $N=64{\times}2^k\;(0{\leq}k{\leq}7)$. To achieve both memory size reduction and the improved SQNR, a two-step conditional scaling technique is devised, which conditionally scales the intermediate results of each computational stage. The performance analysis results show that the average SQNR's of 64~8,192-point FFT's are over 60-dB. The VL_FCore synthesized with a $0.35-{\mu}m$ CMOS cell library has 23,000 gates and 32 Kbytes memory, and it can operate with 75-MHz@3.3-V clock. The 64-point and 8,192-point FFT's can be computed in $2.25-{\mu}s$ and $762.7-{\mu}s$, respectively, thus it satisfies the specifications of various OFDM-based systems.

Labview FPGA Implementation of IGC Algorithm for Real Time Noise Cancelation (실기간 소음제거를 위한 IGC Algorithm의 LabVIEW FPGA 구현)

  • Kim, Chun-Sik;Lee, Chae-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.3C
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    • pp.183-189
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    • 2011
  • The LMS(Least Mean Square) algorithm is generally used because of tenacity, high mating spots and simplicity of realization. But the LMS algorithm has trade-off between nonuniform collect and EMSE(Excess Mean Square Error). To overcome this weakness, variable step size is used widely but it needs a lot of calculation load. In this paper we consider new algorithm, which can reduce calculations and adapt in case of environment changes, uses original signal and noise signal of IGC(Instantaneous Gain Control). For the real time processing of IGC algorithm, we remove the logarithmic function. The performance of proposed algorithm is tested to adaptive noise canceller in automobile. We show implemented LabVIEW FPGA system of IGC algorithm is more efficient than others.

Dynamic Analysis of A High Mobility Tracked Vehicle Using Compliant Track Link Model (유연성 궤도 모델을 사용한 고기동성 궤도차량의 동역학 해석)

  • 백운경;최진환;배대성
    • Journal of KSNVE
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    • v.9 no.6
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    • pp.1259-1266
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    • 1999
  • The objective of this investigation is to develop a compliant track link model and apply this model to the multi-body dynamic analysis of high mobility tracked vehicles. Two major difficulties encountered in developing the compliant track models. The first one is that the integration step size must be kept small in order to maintain the numerical stability of the solution. This solution deals with high oscillatory signals resulting from the impulsive contact forces and stiff compliant elements to represent the joints between the track links. The second difficulty is due to the large number of the system equations of motion of the three dimensional multibody tracked vehicle model. This problem was sloved by decoupling the equations of motion of the chassis subsystem and the track subsystems. Recursive methods are used to obtain a minimum set of equations for the chassis subsystem. Several simulation scenarios were tested for the high mobility tracked vehicle including accelaeration, high speed cruising, braking, and turning motion in order to demonstrate the effectiveness and validity of the methods proposed in this investigation.

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Inductor-less 6~18 GHz 7-Bit 28 dB Variable Attenuator Using 0.18 μm CMOS Technology (0.18 μm CMOS 기반 인덕터를 사용하지 않는 6~18 GHz 7-Bit 28 dB 가변 신호 감쇠기)

  • Na, Yun-Sik;Lee, Sanghoon;Kim, Jaeduk;Lee, Wangyoung;Lee, Changhoon;Lee, Sungho;Seo, Munkyo;Lee, Sung Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.1
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    • pp.60-68
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    • 2016
  • This paper presents a 6~18 GHz 7-bit digital-controlled attenuator. The proposed attenuator is based on switched-T architecture, but no inductor is used for minimum chip size. The designed attenuator was fabricated using $0.18{\mu}m$ CMOS process, and characterized using on-wafer testing setup. The resolution(minimum attenuation step) and the maximum attenuation range of the attenuator were measured to be 0.22 dB and 28 dB, respectively. The measured RMS attenuation error and the RMS phase error for 6~18 GHz were less than 0.26 dB and $3.2^{\circ}$, respectively. The reference state insertion loss was less than 12.4 dB at 6~18 GHz. The measured input and output return losses were better than 9.4 dB over all frequencies and attenuation states. The chip size is $0.11mm^2$ excluding pads.