• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.497-502
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• 2007

Broadband monolithic SiGe HBT variable gain amplifier with a feedforward configuration have been newly developed to improve bandwidth and dB-linearly controlled gain characteristics. The VGA has been implemented in a $0.35-{\mu}m$ BiCMOS process. The VGA achieves a dynamic gain-control range of 19.6 dB and a 3-dB bandwidth of 4 GHz ($4{\sim}8\;GHz$) with the control-voltage range from 0.6 to 2.6 V. The VGA produces a maximum gain of 9.3 dB at 6 GHz and a output power of -3 dBm at 8 GHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.146-149
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• 2000

SiGe HUT뜰 이용하여 Cellular 주파수 대역(824-849 MHz)에서 MMIC 상향 주파수 혼합기와 가변이득 증폭기를 설계하였다. 동작 전압은 2.7 V 이며, 이중평형 구조의 상향 주파수 혼합기는 12 dB의 변환이득, -0.6 dBm의 1dB 이득압축 출력전력, 30 dB 이상의 LO-RF 단자 격리도 특성, 1.25의 LO-VSWR. 1.34의 RF-VSWR을 가지며, 상호컨덕턴스형 가변이득 증폭기는 35 dB의 최대 선형이득, 13 dBm의 1dB 이득압축 출력전력, 42dB의 가변이득, 23dB의 3차 상호변조 교점 출력전력(OIP$_3$), 1.27의 입력 VSWR, 1.1의 출력 VSWR 특성을 보인다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.8
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• pp.16-21
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• 2007

CMOS variable gain amplifier (VGA) IC designs for the structure monitoring systems of the telemetries were developed. A three stage cascaded VGA using a differential amplifier and a linear-in-dB controller is presented. A proposed VGA is a modified version of a conventional VGA such that the gain is controlled in a linear-in-dB fashion through the current ratio. The proposed VGA circuit introduced in this paper has a dynamic range of 77 dB with 1.5 dB gain steps. It also achieved a gain error of less than 1.5 dB over 77 dB gain range. The VGA can operate up to 10MHz dissipating 13.8 mW from a single 1.8 V supply. The core area of the VGA fabricated in a Magnachip $0.18{\mu}m$ standard CMOS process was about $430{\mu}m{\times}350{\mu}m$. According to measurement results, we can verify that the proposed method is reasonable with regard to the enhancement of dynamic range and the better linear-in-dB characteristics.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.90-95
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• 2014

This paper presents a VHF/UHF-band variable gain low noise amplifier for multi-standard mobile TV tuners. A proposed VHF-band variable gain amplifier is composed of a resistive shunt-feedback low noise amplifier to remove external matching components, a single-to-differential amplifier with input PMOS transcoductors to improve low frequency noise performance, a variable shunt-feedback resistor and an attenuator to control variable gain range. A proposed UHF-band variable gain amplifier consists of a narrowband low noise amplifier with capacitive tuning to improve noise performance and interference rejection performance, a single-to-differential with gm gain control and an attenuator to adjust gain control range. The proposed VHF-band and UHF-band variable gain amplifier were designed in a $0.18{\mu}m$ RF CMOS technology and draws 22 mA and 17 mA from a 1.8 V supply voltage, respectively. The designed VHF-band and UHF-band variable gain amplifier show a voltage gain of 27 dB and 27 dB, a noise figure of 1.6-1.7 dB and 1.3-1.7 dB, OIP3 of 13.5 dBm and 16 dBm, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10A
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• pp.1223-1229
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• 2004

A variable-gain low-voltage low noise amplifier MMIC operating at 5GHz frequency band is designed and implemented using the ETRI 0.5$\mu\textrm{m}$ GaAs MESFET library process. This low noise amplifier is designed to have the variable gain for adaptive antenna array combined in HIPERLAN/2. The feedback circuit of a resistor and channel resistance controlled by the gate voltage of enhancement MESFET is proposed for the variable-gain low noise amplifier consisted of cascaded two stages. The fabricated variable gain amplifier exhibits 5.5GHz center frequency, 14.7dB small signal gain, 10.6dB input return loss, 10.7dB output return loss, 14.4dB variable gain, and 2.98dB noise figure at V$\_$DD/=1.5V, V$\_$GGl/=0.4V, and V$\_$GG2/=0.5V. This low noise amplifier also shows-19.7dBm input PldB, -10dBm IIP3, 52.6dB SFDR, and 9.5mW power consumption.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6A
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• pp.697-704
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• 2004

This paper describes the design and fabrication of an MMIC variable gain LNA for 5GHz wireless LAN applications, using 0.5${\mu}{\textrm}{m}$ gate length GaAs MESFET transistors. The advantages of high gain and low noise performance of E-MESFETS and excellent linear performance of D-MESFETS are combined as a cascode topology in this design. Behavioral model equations are derived from the MESFET nonlinear current voltage characteristics by using Turlington's asymptote method in a cascode configuration. Using the behavioral model equations, a 4${\times}$50${\mu}{\textrm}{m}$ E-MESFET as a common source amplifier and a 2${\times}$50${\mu}{\textrm}{m}$ D-MESFET as a common gate amplifier are determined for the cascode amplifier. The fabricated variable gain LNA shows a noise figure of 2.4dB, variable gain range of more than 17dB, IIP3 of -4.8dBm at 4.9GHz, and power consumption of 12.8mW.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.1-8
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• 2013

This paper presents a variable gain amplifier(VGA) without passive devices. This VGA employes the architecture of current feedback amplifier and variable gain can be achieved by using the GM ratios of two trans-conductance(gm) circuits. To obtain linearity and high gain, it uses current division technique and source degeneration in feedback GM circuits. Input trans-conductance(GM) circuit was biased by using a tunable voltage controller to obtain variable gain. The prototype of the VGA is designed in $0.35{\mu}m$ CMOS technology and it is operating in sub-threshold region for low power consumption. The the gain of proposed VGA is varied from 23dB to 43dB, and current consumption is $2.82{\mu}A{\sim}3{\mu}A$ at 3.3V. The area of VGA is 1$120{\mu}m{\times}100{\mu}m$.

• Korean Journal of Optics and Photonics
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• v.8 no.1
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• pp.58-62
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• 1997

A new, simple lasing loop configuration employing a fiber grating was proposed and demonstrated for all-optical gain control of erbium-doped fiber amplifier. The lasing loop was designed such that the fiber grating acts as a notch filter to cutoff the lasing light as well as selects the lasing wavelength. The operating gain was clamped to the same level as the loop loss and it could be varied with a tunable directional coupler in the loop. It is believed that this type of gain-controlled erbiumdoped fiber amplifier can have several advantages when used in wavelength-division-multiplexed transmission systems.

• Journal of IKEEE
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• v.14 no.4
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• pp.257-262
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• 2010

We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)