• Title/Summary/Keyword: 가변블록

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Rate Control in Conditional Replenishment Algorithm for Hybrid 3DTV (융합형 3DTV를 위한 조건부 대체 알고리듬의 비트율 제어기법)

  • Bang, Min-Suk;Lee, Seoung-Joo;Cho, Jung-Sik;Lee, Dong-Hee;Kim, Sung-Hoon;Lee, Joo-Young;Choo, Hyun-Gon;Choi, Jin-Soo;Kim, Jin-Woong;Jung, Kyeong-Hoon;Kang, Dong-Wook
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2012.11a
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    • pp.98-100
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    • 2012
  • 본 논문에서는 좌우 해상도가 서로 다른 융합형 3DTV 시스템에서 합성된 3D 영상의 화질을 개선하는 방법인 조건부 대체 알고리듬에 적용하기 위한 비트율 제어기법을 제안한다. 조건부 대체 알고리듬에서는 쿼드트리 형태의 가변크기 블록마다 좌우 영상간의 양안시차 정보를 활용하되, 이 정보의 전송을 위해서 부가적인 대역폭이 요구되기 때문에 전송 대역폭의 상황에 따라 부가 정보의 양을 효율적으로 조절할 필요가 있다. 이를 위해 비용함수를 정의하고 가중치를 적용하여 최적의 모드를 결정하는 방법을 제안한다.

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A Study on the MARC Format for Holdings Data (소장데이터용 MARC 포맷에 관한 연구)

  • Oh Dong-Geun
    • Journal of the Korean Society for Library and Information Science
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    • v.33 no.3
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    • pp.63-86
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    • 1999
  • This article investigates the general characteristics and developments of the MARC format for holdings data. It also analyzes the record structure, content designation, and the content of it, mainly based on USMARC and KORMARC formats. Structure and content designation of them are almost same with those of the bibliographic and authority formats. The data fields divided into functional blocks based on their functions, but only 0XX, 5XX, 8XX fields are used in the holdings formats. Record contents of the data in the 008 fields include more elements related to the holdings and acquisition information. Variable fields can be grouped into several blocks, including those for numbers and codes; for notes fields, for location , and for holdings data. Holdings data fields include caption and pattern fields, enumeration and chronology fields, textual holdings fields, and item information fields. This article analyzes the content in each data fields in detail.

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Two-stage variable block-size multiresolution motion estiation in the wavelet transform domain (웨이브렛 변환영역에서의 2단계 가변 블록 다해상도 움직임 추정)

  • 김성만;이규원;정학진;박규태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.7
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    • pp.1487-1504
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    • 1997
  • In this paper, the two-stage variable block-size multiresolution motion algorithm is proposed for an interframe coding scheme in the wavelet decomposition. An optimal bit allocagion between motion vectors and the prediction error in sense of minimizing the total bit rate is obtained by the proposed algorithm. The proposed algorithm consists of two stages for motion estimatation and only the first stage can be separated and run on its own. The first stage of the algorithm introduces a new method to give the lower bit rate of the displaced frame difference as well as a smooth motion field. In the second stage of the algorithm, the technique is introduced to have more accurate motion vectors in detailed areas, and to decrease the number of motion vectors in uniform areas. The algorithm aims at minimizin gthe total bit rate which is sum of the motion vectors and the displaced frame difference. The optimal bit allocation between motion vectors and displaced frame difference is accomplished by reducing the number of motion vectors in uniform areas and it is based on a botom-up construction of a quadtree. An entropy criterion aims at the control of merge operation. Simulation resuls show that the algorithm lends itself to the wavelet based image sequence coding and outperforms the conventional scheme by up to the maximum 0.28 bpp.

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Design and Fabrication of Triple-coupler Ring Resonator Filter (삼중 결합 링 공진기 필터의 설계 및 제작)

  • Lee, Young-Sik;Chung, Young-Chul
    • Korean Journal of Optics and Photonics
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    • v.22 no.1
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    • pp.40-45
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    • 2011
  • Design and fabrication of a TCRR (Triple-coupler Ring Resonator) filter which can provide a doubled FSR (Free Spectral Range) compared with a conventional DCRR (Double-coupler Ring Resonator) filter, are discussed. Through the use of a polymer material with a good thermo-optic property and with high contrast between core and cladding polymer, a compact TCRR filter composed of straight and curved buried waveguides of small radius is designed and fabricated. The transmission characteristics from the through and drop ports are measured using a tunable laser and a fiber array block, and the FSR is observed to be 4.4 nm, about twice that of DCRR filter, and almost the same as that obtained from the analysis using a transfer matrix method.

Variable Block Size Motion Estimation Techniques for The Motion Sequence Coding (움직임 영상 부호화를 위한 가변 블록 크기 움직임 추정 기법)

  • 김종원;이상욱
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.4
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    • pp.104-115
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    • 1993
  • The motion compensated coding (MCC) technique, which exploits the temporal redundancies in the moving images with the motion estimation technique,is one of the most popular techniques currently used. Recently, a variable block size(VBS) motion estimation scheme has been utilized to improve the performance of the motion compensted coding. This scheme allows large blocks to the used when smaller blocks provide little gain, saving rates for areas containing more complex motion. Hence, a new VBS motion estimation scheme with a hierarchical structure is proposed in this paper, in order to combine the motion vector coding technique efficiently. Topmost level motion vector, which is obtained by the gain/cost motion estimation technique with selective motion prediction method, is always transmitted. Thus, the hierarchical VBS motion estimation scheme can efficiently exploit the redundancies among neighboring motion vectors, providing an efficient motion vector encoding scheme. Also, a restricted search with respect to the topmost level motion vector enables more flexible and efficient motion estimation for the remaining lower level blocks. Computer simulations on the high resolution image sequence show that, the VBS motion estimation scheme provides a performance improvement of 0.6~0.7 dB, in terms of PSNR, compared to the fixed block size motion estimation scheme.

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A DLL-Based Frequency Synthesizer for Generation of Various Clocks (가변 클록 발생을 위한 DLL 주파수 합성기)

  • 이지현;송윤귀;최영식;최혁환;류지구
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.6
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    • pp.1153-1157
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    • 2004
  • This paper describes a new programmable DLL_based frequency synthesizer. Generally, PLLs have been used for frequency synthesis. Inherent fast locking DLLs are also used for frequency synthesis. However, DLL needs a frequency multiplier for various frequencies. A conventional frequency multiplier used in DLL has a restriction in which a multiple is fixed. However, the proposed DLL can generate clocks which are from 6 times to 10 times of the reference clock. Frequency range of the proposed DLL is from 600MHz to 1GHz. The idea has been confirmed by HSPICE simulations in a $0.35-\mu\textrm{m}$ CMOS process.

Improvement of Normalized CMA Channel Equalization and Turbo Code for DS-CDMA System (DS-CDMA 시스템을 위한 터보 부호와 정규화 CMA 채널 등화 개선)

  • 박노진;강철호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.7A
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    • pp.659-667
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    • 2002
  • In this dissertation, in the Turbo Code used for error correction coding of the recent digital communication systems, we propose a new S-R interleaver that has the better performance than the existing block interleaver, and the Turbo Decoder that has the parallel concatenated New structure using the MAP algorithm. For real-time voice and video services over the third generation mobile communications, the performance of two proposed methods is analyzed by the reduced decoding delay using the variable decoding method by computer simulation over multipath channels of DS-CDMA system. Also, a Modified NCMA based on conventional NCMA is proposed to improve the channel efficiency in the mobile communication system, and is investigated over the multi-user environment of DS-CDMA system through computer simulation.

An Improved Motion Compensated Temporal Filtering for Efficient Scalable Video Coding (효율적인 스케일러블 비디오 부호화를 위한 향상된 움직임 보상 시간적 필터링 방법)

  • Jeon, Ki-Cheol;Kim, Jong-Ho;Jeong, Je-Chang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.5C
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    • pp.520-529
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    • 2007
  • In this paper, we study the characteristics of parameters which are related to performance of MCTF which is a key technique for wavelet-based scalable video coding, and propose an improved MCTF method. The proposed MCTF method adopts the motion estimation of which motion vector field is distributed more uniformly using variable block sizes. By using the proposed method, the decomposition performance of temporal filter is improved, and the energy in high-frequency frames is reduced. It can help the entropy coder to generate lower bitrate. From simulation results, we verify the decomposed energy on high-frequency frame using the proposed method is reduced by 25.86% at the most in terms of variance of the high-frequency frame.

A Software Architecture for High-speed PCE (Path Computation Element) Protocol (고성능 PCE (Path Computation Element) 프로토콜 소프트웨어 구조)

  • Lee, Wonhyuk;Kim, Seunhae;Kim, Hyuncheol
    • Convergence Security Journal
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    • v.13 no.6
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    • pp.3-9
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    • 2013
  • With the rapidly changing information communication environment and development of technologies, the informati on networks are evolved from traditional fixed form to an active variable network that flexible large variety of data can be transferred. To reflect the needs of users, the next generation using DWDM (Dense Wavelength Division M ultiplexing) transmission system and OXC (Optical Cross Connect) form a dynamic network. After that GMPLS (Ge neralized Multi-Protocol Label Switching) can be introduced to dynamically manage and control the Reconfigurable Optical Add-drop Multiplexer (ROADM)/Photonic Cross Connect (PXC) based network. This paper propose a softw are architecture of Path Computation Element (PCE) protocol that has proposed by Internet Engineering Task Force (IETF) to path computation. The functional blocks and Application Programming Interface (API) of the PCE protoco l implementation are also presented.

A Power Efficient Versatile Carry Skip Adder Architecture for the Multimode Mobile Modem (멀티모드 이동 통신 모뎀을 위한 전력 효율적 다기능 캐리스킵 가산기)

  • Han, Tae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.86-93
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    • 2008
  • The multi-mode terminal modem which is capable of accommodating a variety of wireless communication standards needs versatile arithmetic units for processing a variety of word lengths and wide range of data rates. Since the target hardware is usually designed to meet the required highest performance, it is often wasteful in power consumption especially when low rate data processing cases. Thus, a speed and power adaptability of the arithmetic unit is a desirable feature for the wireless applications. In this paper, we propose a power efficient versatile adder architecture with carry skip logic as a basic building block constructed in hierarchical manner. The validity of the architecture is shown with respect to size, performance, and power efficiency in diverse operating modes.