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A DLL-Based Frequency Synthesizer for Generation of Various Clocks  

이지현 (부경대학교 전자컴퓨터정보통신공학부)
송윤귀 (부경대학교 전자컴퓨터정보통신공학부)
최영식 (부경대학교 전자컴퓨터정보통신공학부)
최혁환 (부경대학교 전자컴퓨터정보통신공학부)
류지구 (부경대학교 전자컴퓨터정보통신공학부)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.8, no.6, 2004 , pp. 1153-1157 More about this Journal
Abstract
This paper describes a new programmable DLL_based frequency synthesizer. Generally, PLLs have been used for frequency synthesis. Inherent fast locking DLLs are also used for frequency synthesis. However, DLL needs a frequency multiplier for various frequencies. A conventional frequency multiplier used in DLL has a restriction in which a multiple is fixed. However, the proposed DLL can generate clocks which are from 6 times to 10 times of the reference clock. Frequency range of the proposed DLL is from 600MHz to 1GHz. The idea has been confirmed by HSPICE simulations in a $0.35-\mu\textrm{m}$ CMOS process.
Keywords
frequency multiplier; edge detector; VCDL;
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