• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.10
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• pp.1845-1852
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• 2008

The key elements of inter prediction are motion estimation(ME) and motion compensation(MC). Motion estimation is to find the optimum motion vectors, not only by using a distance criteria like the SAD, but also by taking into account the resulting number of 비트s in the 비트 stream. Motion compensation is compensate for movement of blocks of current frame. Inter-prediction Encoding is always the main bottleneck in high-quality streaming applications. Therefore, in real-time streaming applications, dedicated hardware for executing Inter-prediction is required. In this paper, we studied a motion estimator(ME) for H.264/AVC. The designed motion estimator is based on 2-D systolic array and it connects processing elements for fast SAD(Sum of Absolute Difference) calculation in parallel. By providing different path for the upper and lower lesion of each reference data and adjusting the input sequence, consecutive calculation for motion estimation is executed without pipeline stall. With data reuse technique, it reduces memory access, and there is no extra delay for finding optimal partitions and motion vectors. The motion estimator supports variable-block size and takes 328 cycles for macro-block calculation. The proposed architecture is local memory-free different from paper [6] using local memory. This motion estimation encoder can be applicable to real-time video processing.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.1-11
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• 1999

In this paper, we proposed a design method of parameterized viterbi decoder, which automatically synthsizes the diverse viterbi deciders used in the digital mobile communication systems. It is designed to synthesize a viterbi decoder specified by user-provided parameters. Those parameters are constraint length, code rate generator polynomials of teh convolutional encoder, data rate and bits/frame of the data transmission, and soft decision bits of viterbi decoder. For the design of the parameterized viterbi decoder, we designed a user interface module C-language, and a viterbi decoder module in a hierarchical atructure using VHDL language and its generic statement. For the verification of the parameterized viterbi decoder, we compared our synthesized viterbi decoder with the conventional viterbi decoder which is designed for the IS-95 CDMA system. The proposed design method of the viterbi decoder will be a new method to obtain a required viterbi decoder in a very short time only by supplying the design parameters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8C
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• pp.763-770
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• 2006

In this paper, a variable Reed-Solomon(RS) decoder with erasure decoding functionality is designed based on the modified Euclid's algorithm(MEA). The variability of the decoder is implemented through shortening and puncturing based on the RS(124, 108, 8) code, other than the primitive RS(255, 239, 8) code. This leads to shortening the decoding latency. The decoder performs 4-step pipelined operation, where each step is designed to be clocked by an independent clock. Thus by using a faster clock for the MEA block, the complexity and the decoding latency can be reduced. It can support both continuous- and burst-mode decoding. It has been designed in VHDL and synthesized in an FPGA chip, consuming 3,717 logic cells and 2,048-bit memories. The maximum decoding throughput is 33 MByte/sec.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.7A
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• pp.994-1004
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• 2000

In this paper, bitstreams are composed of using H.263 for a moving picture coding in the band-limited and error-prone environment such as wireless environment. EREC sub-frames are implemented by applying the proposed EREC algorithm in order to be UEP for the real data parts of implemented bitstreams. Because those are able to do resynchronization with a block unit, propagation of the error can be minimized, and the position of the important bits such as INTRADC and MVD can be known. Class is separated using the position of these important bits, and variable puncturing tables are designed by the class informations and the code rates of turbo codes are differently designed in according to the class. Channel coding used the turbo codes, and an interleaver to be designed in the turbo codes does not eliminate redundancy bits of the important bits in applying variable code rates of EREC sub-frames unit and is always the same at the transmitter and the receiver although being variable frame size. As a result of simulation, UEP with the code rate similar to EEP is obtained a improved result in the side of bit error probability. And the result of applying it to image knows that the subjective and objective quality have been improved by the protection of important bits.

• The KIPS Transactions:PartB
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• v.16B no.2
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• pp.123-130
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• 2009

Motion estimation (ME) plays an important role in digital video compression. But it limits the performance of image quality and encoding speed and is computational demanding part of the encoder. To reduce computational time and maintain the image quality, integer pel and fractional pel ME methods are proposed in this paper. The proposed method for integer pel ME uses a hierarchical search strategy. This strategy method consists of symmetrical cross-X pattern, multi square grid pattern, diamond patterns. These search patterns places search points symmetrically and evenly that can cover the overall search area not to fall into the local minimum and to reduce the computational time. The proposed method for fractional pel uses full search pattern, center biased fractional pel search pattern and the proposed search pattern. According to block sizes, the proposed method for fractional pel decides the search pattern adaptively. Experiment results show that the speedup improvement of the proposed method over Unsymmetrical cross Multi Hexagon grid Search (UMHexagonS) and Full Search (FS) can be up to around $1.2{\sim}5.2$ times faster. Compared to image quality of FS, the proposed method shows an average PSNR drop of 0.01 dB while showing an average PSNR gain of 0.02 dB in comparison to that of UMHexagonS.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.5
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• pp.1187-1193
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• 2014

This paper presents an effective motion estimation to improve the performance of the motion compensated temporal filtering (MCTF) which is a core part of the wavelet-based scalable video coding. The proposed scheme makes the motion vector field uniform by the modified median operation and the search strategies using adjacent motion vectors, in order to enhance the pixel connectivity which is significantly relevant to the performance of the MCTF. Moreover, the motion estimation with variable block sizes that reflects the features of frames is introduced for further correlation improvement of the motion vector field. Experimental results illustrate that the proposed method reduces the decomposed energy on the temporal high frequency subband frame up to 30.33% in terms of variance compared to the case of the full search with fixed block sizes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.9
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• pp.1-6
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• 2010

H.264 video coding standard is widely used due to the high compression rate and quality. H.264 decoders usually have pipeline architecture by a macroblock or a $4{\times}4$ sub-block. The period of the pipeline is usually fixed to guarantee the operation in the worst case which results in many idle cycles and the requirement of high data bandwidth and high performance processing units. We propose adaptive pipeline architecture for H.264 decoders for efficient decoding and lower the requirement of the bandwidth for the memory bus. Parameters and coefficients are delivered using hand-shaking communication through dedicated interconnections and frame pixel data are transferred using AMBA AHB network. The processing time of each block is variable depending on the characteristics of images, and the processing units start to work whenever they are ready. An H.264 decoder is designed and implemented using the proposed architecture to verify the operation using an FPGA.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.6
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• pp.599-607
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• 2001

In Conventional BMA, the motion vector can describe only translational movement and blocking noise is generated. To overcome this defect, motion estimation using triangular mesh has been proposed. The regular mesh is the method of dividing the image area into equal size triangle and haying the same node connection. It has no additional information about mesh structure, but do not reflect the real motion because it represents the regions by equal mesh structure regardless of the amount of motion. In this paper, motion estimation using dynamic regular mesh is proposed, In this method, the mesh structure is varied from the amount of motion and maintain the form of regular mesh. By the simulation, proposed method have better performance in PSNR and is superior to the other method in convergence rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4C
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• pp.407-416
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• 2006

It is difficult for the movement detection of an object through a camera to detect exact movement because of unnecessary noises and changes of the light. It can be recognized as a background, when there is no movement after the inflow of an object. Therefore, It is necessary to fast search algorithm for tracking and extract of object that is realtime image. In this thesis, we evaluate the difference of the input vision based on initial image and replace some pixels in process of time. When there is a big difference between background image and input image, we decide it is the point of the time of the object input and then extract boundary point of it. The extracted boundary point detects precise movement of the object by creating minimum block of it and searching block that maintaining distance. The designed and embodied system shows more than 95% accuracy in the performance test.

• Journal of KIISE:Information Networking
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• v.33 no.1
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• pp.91-102
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• 2006

We analyze the performance of MAC-layer Reed-Solomon error recovery in the cdma2000 1xEV-DO Broadcast and Multicast Services (BCMCSs) environment, with respect to the size of the ECB (Error Control Block) and the air-channel condition, and establish the relationship between ECB size, error recovery capacity and service latency. From this we propose an adaptive error recovery scheme which adjusts the size of the ECB to reflect the environment of the mobile nodes so as to meet the required service quality (target bit error-rate), while reducing the latency of real-time applications. Extensive simulation results show the effectiveness of our approach compared to the current static scheme. Proposed adaptive schemes achieves near optimal solution with respect to service latency while satisfying the required service quality.