• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.2
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• pp.370-378
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• 2017

A fluid model of 2D axis-symmetry based on inductively coupled plasma (ICP) reactor using $N_2/NH_3/SiH_4$ gas mixture has been developed for hydrogenated silicon nitride ($SiN_x:H$) deposition. The model was comprised of 62 species (electron, neutral, ions, and excitation species), 218 chemical reactions, and 45 surface reactions. The pressure (10~40 mTorr) and gas mixture ratio ($N_2$ 80~96 %, $NH_3$ 2~10 %, $SiH_4$ 2~10 %) were considered simulation variables and the input power fixed at 1000 W. Different distributions of electron, ions, and molecules density were observed with pressure. Although ionization rate of $SiH_2{^+}$ is higher than $SiH_3{^+}$ by electron direct reaction with $SiH_4$, the number density of $SiH_3{^+}$ is higher than $SiH_2{^+}$ in over 30 mTorr. Also, number density of $NH^+$ and $NH_4{^+}$ dramatically increased by pressure increase because these species are dominantly generated by gas phase reactions. The change of gas mixture ratio not affected electron density and temperature. With $NH_3$ and $SiH_4$ gases ratio increased, $SiH_x$ and $NH_x$ (except $NH^+$ and $NH_4{^+}$) ions and molecules are linearly increased. Number density of amino-silane molecules ($SiH_x(NH_2)_y$) were detected higher in conditions of high $SiH_x$ and $NH_x$ molecules density.

• Tribology and Lubricants
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• v.4 no.2
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• pp.36-43
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• 1988

Titanium carbide(TiC) and titanium nitride(TiN) flims were deposited on $Si_3N_4$-TiC composite cutting tools by chemical vapor deposition(CVD) using $TiCl_4-CH_4-H_2$ and $TiCl_4-H_2-N_2$ gas mixtures, respectively. The nonmetal to metal ratio of deposit increases with increasing $m_{C/Ti}$(mole ratio of CH$_4$ to TiCl$_4$ in the input) for TiC coatings and $m_{N/Ti}$(mole ratio of N$_2$ to TiCl$_4$ in the input) for TiN coatings. The nearly stoiahiometric films could be obtained under the deposition condition of $m_{C/Ti}$ between 1.15 and 1.61 for TiC, and that of $m_{N/Ti}$ between 25 and 28 for TiN. Also maximum microhardness of the coatings can be obtained in these ranges. The interfacial region of TiC coatings on $Si_3N_4$-TiC ceramics is wider than that of TiN coatings according to Auger depth profile analysis, which indicates good interfacial bonding for TiC. Experimental results show that TiC coatings have an randomly equiaxed structure and Columnar structure with(220) preferred orientation can be obtained for TiN coatings. And, multilayer coatings have a dense and equiaxed structure.

• Journal of the Korean institute of surface engineering
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• v.40 no.6
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• pp.279-282
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• 2007

Cr-Mo-Si-C-N coatings were deposited on steel and Si wafer by a hybrid system of AIP and sputtering techniques using Cr, Mo and Si target in $Ar/N_2/CH_4$ gaseous mixture. Instrumental analyses of XRD and XPS revealed that the Cr-Mo-Si-C-N coatings must be a composite consisting of fine(Cr, Mo and Si)(C and N) crystallites and amorphous $Si_3N_4$ and SiC. The hardness value of Cr-Mo-Si-C-N coatings significantly increased from 41 GPa of Cr-Mo-C-N coatings to about 53 GPa with Si content of 9.3 at.% due to the refinement of (Cr, Mo and Si)(C and N) crystallites and the composite microstructure characteristics. A systematic investigation of the microstructures and mechanical properties of Cr-Mo-Si-C-N coatings prepared with various Si contents is reported in this paper.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.53-53
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• 2009

Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

• Corrosion Science and Technology
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• v.6 no.1
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• pp.24-28
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• 2007

Alumina coated SiC whiskers were prepared by homogeneous precipitation of aluminum sulfate. The Si3N4 composites reinforced with coated SiC whiskers were fabricated by hot-pressing at $1800^{\circ}C$ for 2 h under an $N_{2}$ atmosphere of 0.1 MPa to examine the effects of coated whiskers on the mechanical properties of SiC whisker reinforced $Si_{3}N_{4}$ composite. By the addition of alumina coated SiC whiskers instead of as received ones, the fracture toughness of composite was about 6.7 $MPam^{1/2}$ which was slightly lower than as received SiC whisker reinforced composite. This result seems to be caused by the fact that the crack deflection and whisker pull-out were decreased. Thus, alumina coated SiC whiskers were considered to form relatively strong interface bond with $Si_{3}N_{4}$ matrix.

• Proceedings of the Korean Ceranic Society Conference
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• 2004.04b
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• pp.45.4-45.4
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• 2004

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.301-307
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• 2002

Direct bonded SOI wafer pairs with $Si ll SiO_2/Si_3N_4 ll Si$ the heterogeneous insulating layers of SiO$_2$-Si$_3$N$_4$are able to apply to the micropumps and MEMS applications. Direct bonding should be executed at low temperature to avoid the warpage of the wafer pairs and inter-diffusion of materials at the interface. 10 cm diameter 2000 ${\AA}-SiO_2/Si(100}$ and 560 $\AA$- ${\AA}-Si_3N_4/Si(100}$ wafers were prepared, and wet cleaned to activate the surface as hydrophilic and hydrophobic states, respectively. Cleaned wafers were pre- mated with facing the mirror planes by a specially designed aligner in class-100 clean room immediately. We employed a heat treatment equipment so called fast linear annealing(FLA) with a halogen lamp to enhance the bonding of pre mated wafers We kept the scan velocity of 0.08 mm/sec, which implied bonding process time of 125 sec/wafer pairs, by varying the heat input at the range of 320~550 W. We measured the bonding area by using the infrared camera and the bonding strength by the razor blade clack opening method, respective1y. It was confirmed that the bonding area was between 80% and to 95% as FLA heat input increased. The bonding strength became the equal of $1000^{\circ}C$ heat treated $Si ll SiO_2/Si_3N_4 ll Si$ pair by an electric furnace. Bonding strength increased to 2500 mJ/$\textrm{m}^2$as heat input increased, which is identical value of annealing at $1000^{\circ}C$-2 hr with an electric furnace. Our results implies that we obtained the enough bonding strength using the FLA, in less process time of 125 seconds and at lowed annealing temperature of $400^{\circ}C$, comparing with the conventional electric furnace annealing.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.10
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• pp.495-499
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• 2004

Characteristics of ohmic Ni/Si/Ni contacts to n-type 4H-SiC are investigated systematically. The ohmic contacts were formed by annealing Ni/Si/Ni sputtered sequentially The annealings were performed at 950℃ using RTP in vacuum ambient and N₂ ambient, respectively. The specific contact resistivity(p/sub c/), sheet resistance(R/sub s/), contact resistance (R/sub c/) transfer length(L/sub T/) were calculated from resistance(R/sub T/) versus contact spacing(d) measurements obtained from TLM(transmission line method) structure. While the resulting measurement values of sample annealed at vacuum ambient were p/sub c/ = 3.8×10/sup -5/Ω㎠, R/sub c/ = 4.9 Ω and R/sub T/ = 9.8 Ω, those of sample annealed at N₂ ambient were p/sub c/ = 2.29×10/sup -4/Ω㎠, R/sub c/ = 12.9 Ω and R/sub T/ = 25.8 Ω. The physical properties of contacts were examined using XRD 3nd AES. The results showed that nickel silicide was formed on SiC and Ni was migrated into SiC. This result indicates that Ni/Si/Ni ohmic contact would be useful in high performance electronic devices.

• Journal of the Korean Ceramic Society
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• v.30 no.10
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• pp.829-837
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• 1993

Chemically and geometrically homogeneous mixing of Si3N4 powders with sintering additives(YAG, 3Y2O3$.$5Al2O3) was attempted via coprecipitation method. X-ray dot maps for the additive elements(Al and Y) showed that the additives are evenly distributed in the powder mixture prepared by coprecipitation method(CP). TEM observation of the coprecipittion-treated Si3N4 powders revealed that they are covered with extremely fine crystallites of additive. The shift in isoelectric point(IEP) of Si3N4 powders from pH 6.7 to pH 7.9 after coprecipitation mixing gave another evidence for coating of Si3N4 powders with YAG additives. SIMS analysis for composition on the surface and in the matrix of mixed powders showed that the YAG additives are highly enriched on the surface of coprecipitation-treated Si3N4 powders. Especially when a small amount of additive was used, the effect of homogeneous additive distribution on densification was preceptible: After pressureless-sintering of powder compacts containing 5 mol% YAG at 1800$^{\circ}C$ for 0.5h, a sintered density of 96.5% theoretical was obtained from the specimens prepared bycoprecipitation in comparison with 93.8% from the mechanically-mixed one.

• 정보저장시스템학회:학술대회논문집
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• 2005.10a
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• pp.22-25
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• 2005

In this research, a wafar-level transfer method of cantilever array on a conventional CMOS circuit has been developed for high density probe-based data storage. The transferred cantilevers were silicon nitride ($Si_3N_4$) cantilevers integrated with poly silicon heaters and piezoelectric sensors, called thermo-piezoelectric $Si_3N_4$ cantilevers. In this process, we did not use a SOI wafer but a conventional p-type wafer for the fabrication of the thermo-piezoelectric $Si_3N_4$ cantilever arrays. Furthermore, we have developed a very simple transfer process, requiring only one step of cantilever transfer process for the integration of the CMOS wafer and cantilevers. Using this process, we have fabricated a single thermo-piezoelectric $Si_3N_4$ cantilever, and recorded 65nm data bits on a PMMA film and confirmed a charge signal at 5nm of cantilever deflection. And we have successfully applied this method to transfer 34 by 34 thermo-piezoelectric $Si_3N_4$ cantilever arrays on a CMOS wafer. We obtained reading signals from one of the cantilevers.