• Title/Summary/Keyword: $SiO_2$ Dielectric Layer

Search Result 295, Processing Time 0.029 seconds

Epitaxial growth of yttrium-stabilized HfO$_2$ high-k gate dielectric thin films on Si

  • Dai, J.Y.;Lee, P.F.;Wong, K.H.;Chan, H.L.W.;Choy, C.L.
    • Electrical & Electronic Materials
    • /
    • v.16 no.9
    • /
    • pp.63.2-64
    • /
    • 2003
  • Epitaxial yttrium-stabilized HfO$_2$ thin films were deposited on p-type (100) Si substrates by pulsed laser deposition at a relatively lower substrate temperature of 550. Transmission electron microscopy observation revealed a fixed orientation relationship between the epitaxial film and Si; that is, (100)Si.(100)HfO$_2$ and [001]Si/[001]HfO$_2$. The film/Si interface is not atomically flat, suggesting possible interfacial reaction and diffusion, X-ray photoelectron spectrum analysis also revealed the interfacial reaction and diffusion evidenced by Hf silicate and Hf-Si bond formation at the interface. The epitaxial growth of the yttrium stabilized HfO$_2$ thin film on bare Si is via a direct growth mechanism without involoving the reaction between Hf atoms and SiO$_2$ layer. High-frequency capacitance-voltage measurement on an as-grown 40-A yttrium-stabilized HfO$_2$ epitaxial film yielded an dielectric constant of about 14 and equivalent oxide thickness to SiO$_2$ of 12 A. The leakage current density is 7.0${\times}$ 10e-2 A/$\textrm{cm}^2$ at 1V gate bias voltage.

  • PDF

Interfacial properties of ZrO$_2$ on silicon

  • Lin, Y.S.;Puthenkovilakam, R.;Chang, J.P.
    • Electrical & Electronic Materials
    • /
    • v.16 no.9
    • /
    • pp.65.1-65
    • /
    • 2003
  • The interface of zirconium oxide thin films on silicon is analyzed in detail for their potential applications in the microelectronics. The formation of an interfacial layer of ZrSi$\sub$x/O$\sub$y. with graded Zr concentration is observed by the x-ray photoelectron spectroscopy and secondary ion mass spectrometry analysis. The as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y//Si sample is thermally stable up to 880$^{\circ}C$, but is less stable compared to the ZrO$_2$/SiO$_2$/Si samples. Post-deposition annealing in oxygen or ammonia improved the thermal stability of as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y/Si to 925$^{\circ}C$, likely due to the oxidation/nitridation of the interface. The as-deposited film had an equivalent oxide thickness of∼13 nm with a dielectric constant of ∼21 and a leakage current of 3.2${\times}$10e-3 A/$\textrm{cm}^2$ at 1.5V. Upon oxygen or ammonia annealing, the formation of SiO$\sub$x/ and SiH$\sub$x/N$\sub$y/O$\sub$z/ at the interface reduced the overall dielectric constants.

  • PDF

Gate dielectric SiO2 film deposition on poly Silicon using UV-excited ozone gas without heating substrate.

  • Kameda, Naoto;Nishiguchi, Tetsuya;Morikawa, Yoshiki;Kekura, Mitsuru;Nonaka, Hidehiko;Ichimura, Shingo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2007.08a
    • /
    • pp.915-918
    • /
    • 2007
  • We have grown $SiO_2$ film on a polycrystalline Si layer using excited ozone gas, which is produced by ultra-violet light irradiation to ozone gas, without heating substrate. The obtained $SiO_2$ film shows dielectric properties comparable to the device quality films measured at the MIS capacitor configuration.

  • PDF

Dielectric Characteristics of $Ta_2O_5$ Thin Films Prepared by ECR-PECVD (ECR-플라즈마 화학 증착법에 의해 제조된 $Ta_2O_5$ 박막의 유전 특성)

  • 조복원;안성덕;이원종
    • Journal of the Korean Ceramic Society
    • /
    • v.31 no.11
    • /
    • pp.1330-1336
    • /
    • 1994
  • Ta2O5 films were deposited on the p-Si(100) substrates by ECR-PECVD and annealed in O2 atmosphere. The thicknesses of Ta2O5/SiO2 layers were measured by an ellipsometer and a cross-sectional TEM. Annealing in O2 atmosphere enhanced the stoichiometry of the Ta2O5 film and reduced the impurity carbon content. Ta2O5 films were crystallized at the annealing temperatures above 75$0^{\circ}C$. The best leakage current characteristics and the maximum dielectric constant of Ta2O5/SiO2 film capacitor were observed in the specimen annealed at $700^{\circ}C$ and 75$0^{\circ}C$, respectively. The flat band voltage of the Al/Ta2O5/SiO2/p-Si MOS capacitor was varied in the range of -0.6~-1.6 V with the annealing temperature. The conduction mechanism in the Ta2O5 film, the variation of the effective oxide charge density with the annealing temperature, and the effective electric field distribution in the Ta2O5/SiO2 double layer were also discussed.

  • PDF

A Study on the Structure and Electrical Properties of CeO$_2$ Thin Film (CeO$_2$ 박막의 구조적, 전기적 특성 연구)

  • 최석원;김성훈;김성훈;이준신
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1999.05a
    • /
    • pp.469-472
    • /
    • 1999
  • CeO$_2$ thin films have used in wide applications such as SOI, buffer layer, antirflection coating, and gate dielectric layer. CeO$_2$takes one of the cubic system of fluorite structure and shows similar lattice constant (a=0.541nm) to silicon (a=0.543nm). We investigated CeO$_2$films as buffer layer material for nonvolatile memory device application of a single transistor. Aiming at the single transistor FRAM device with a gate region configuration of PZT/CeO$_2$ /P-Si , this paper focused on CeO$_2$-Si interface properties. CeO$_2$ films were grown on P-type Si(100) substrates by 13.56MHz RF magnetron sputtering system using a 2 inch Ce metal target. To characterize the CeO$_2$ films, we employed an XRD, AFM, C-V, and I-V for structural, surface morphological, and electrical property investigations, respectively. This paper demonstrates the best lattice mismatch as low as 0.2 % and average surface roughness down to 6.8 $\AA$. MIS structure of CeO$_2$ shows that breakdown electric field of 1.2 MV/cm, dielectric constant around 13.6 at growth temperature of 200 $^{\circ}C$, and interface state densities as low as 1.84$\times$10$^{11}$ cm $^{-1}$ eV$^{-1}$ . We probes the material properties of CeO$_2$ films for a buffer layer of FRAM applications.

  • PDF

Quantitative Analysis of Ultrathin SiO2 Interfacial Layer by AES Depth Profilitng

  • Soh, Ju-Won;Kim, Jong-Seok;Lee, Won-Jong
    • The Korean Journal of Ceramics
    • /
    • v.1 no.1
    • /
    • pp.7-12
    • /
    • 1995
  • When a $Ta_O_5$ dielectric film is deposited on a bare silicon, the growth of $SiO_2$ at the $Ta_O_5$/Si interface cannot be avoided. Even though the $SiO_2$ layer is ultrathin (a few nm), it has great effects on the electrical properties of the capacitor. The concentration depth profiles of the ultrathin interfacial $SiO_2$ and $SiO_2/Si_3N_4$ layers were obtained using an Auger electron spectroscopy (AES) equipped with a cylindrical mirror analyzer (CMA). These AES depth profiles were quantitatively analyzed by comparing with the theoretical depth profiles which were obtained by considering the inelastic mean free path of Auger electrons and the angular acceptance function of CMA. The direct measurement of the interfacial layer thicknesses by using a high resolution cross-sectional TEM confirmed the accuracy of the AES depth analysis. The $SiO_2/Si_3N_4$ double layers, which were not distinguishable from each other under the TEM observation, could be effectively analyzed by the AES depth profiling technique.

  • PDF

Dielectric Properties of $Ta_2O_{5-X}$ Thin Films with Buffer Layers

  • Kim, In-Sung;Song, Jae-Sung;Yun, Mun-Soo;Park, Chung-Hoo
    • KIEE International Transactions on Electrophysics and Applications
    • /
    • v.12C no.4
    • /
    • pp.208-213
    • /
    • 2002
  • The present study describe the electrical performance of amorphous T $a_2$ $O_{5-X}$ fabricated on the buffer layers Ti and Ti $O_2$. T $a_2$ $O_{5-X}$ thin films were grown on the Ti and Ti $O_2$ layers as a capacitor layer using reactive sputtering method. The X-ray pattern analysis indicated that the two as-deposited films were amorphous and the amorphous state was kept stable on the RTA(rapid thermal annealing) at even $700^{\circ}C$. Measurements of dielectric properties of the reactive sputtered T $a_2$ $O_{5-X}$ thin films fabricated in two simple MIS(metal insulator semiconductor), structures, (Cu/T $a_2$ $O_{5}$ Ti/Si and CuT $a_2$ $O_{5}$ Ti $O_2$Si) show that the amorphous T $a_2$ $O_{5}$ grown on Ti showed high dielectric constant (23~39) and high leakage current density(10$^{-3}$ ~10$^{-4}$ (A/$\textrm{cm}^2$)), whereas relatively low dielectric constant (~15) and tow leakage current density(10$^{-9}$ ~10$^{-10}$ (A/$\textrm{cm}^2$)) were observed in the amorphous T $a_2$ $O_{5}$ deposited on the Ti $O_2$ layer. The electrical behaviors of the T $a_2$ $O^{5}$ thin films were attributed to the contribution of Ti- $O_2$ and the compositionally gradient Ta-Ti-0, being the low dielectric layer and high leakage current barrier. In additional, The T $a_2$ $O_{5}$ Ti $O_2$ thin films exhibited dominant conduction mechanism contributed by the Poole-Frenkel emission at high electric field. In the case of T $a_2$ $O_{5}$ Ti $O_2$ thin films were related to the diffusion of Ta, Ti and O, followed by the creation of vacancies, in the rapid thermal treated thin films.films.

Dielectric Properties of Ca0.8Sr1.2Nb3O10 Nanosheet Thin Film Deposited by the Electrophoretic Deposition Method

  • Yim, Haena;Yoo, So-Yeon;Choi, Ji-Won
    • Journal of Sensor Science and Technology
    • /
    • v.27 no.1
    • /
    • pp.1-5
    • /
    • 2018
  • Two-dimensional (2D) niobate-based nanosheets have attracted attention as high-k dielectric materials. We synthesized strontiumsubstituted calcium niobate ($Ca_{0.8}Sr_{1.2}Nb_3O_{10}$) nanosheets by a two-step cation exchange process from $KCa_{0.8}Sr_{1.2}Nb_3O_{10}$ ceramic. The $K^+$ ions were exchanged with $H^+$ ions, and then H+ ions were exchanged with tetrabutylammonium ($TBA^+$) cations. The $Ca_{0.8}Sr_{1.2}Nb_3O_{10}$ nanosheets were then exfoliated, decreasing the electrostatic interaction between each niobate layer. Furthermore, $Ca_2Nb_3O_{10}$ nanosheets were synthesized in same process for comparison. Each exfoliated nanosheet shows a single-crystal phase and has a lateral size of over 100 nm. The nanosheets were deposited on a $Pt/Ti/SiO_2/Si$ substrate by the electrophoretic deposition (EPD) method at 40 V, followed by ultraviolet irradiation of the films in order to remove the remaining $TBA^+$ ions. The $Ca_{0.8}Sr_{1.2}Nb_3O_{10}$ thin film exhibited twice the dielectric permittivity (~60) and lower dielectric loss than $Ca_2Nb_3O_{10}$ thin films.

Electrical Stress in High Permittivity TiO2 Gate Dielectric MOSFETs

  • Kim, Hyeon-Seag;S. A. Campbell;D. C. Gilmer
    • Electrical & Electronic Materials
    • /
    • v.11 no.10
    • /
    • pp.94-99
    • /
    • 1998
  • Suitable replacement materials for ultrathin SiO2 in deeply scaled MOSFETs such as lattice polarizable films, which have much higherpermittivities than SiO2, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown, and hot carrier effect measurements were done on 190 layers of TiO2 which were deposited through the metal-organic chemical vapor deposition of titanium tetrakis-isopropoxide (TTIP). Measurements of the high and low frequency capacitance indicate that virtually no interface state are created during constant current injection stress. The increase in leakage upon electrical stress suggests that uncharged, near-interface states may be created in the TiO2 film near the SiO2 interfacial layer that allow a tunneling current component at low bias.

  • PDF

Red-emissive Y2SiO5:Eu3+ Phosphor-based Electroluminescence Device (Y2SiO5:Eu3+ 형광체 기반 적색 전계 발광 소자)

  • Hyunjee Jung;Sunho Park;Jong Su Kim;Hoon Heo
    • Journal of the Semiconductor & Display Technology
    • /
    • v.22 no.1
    • /
    • pp.83-87
    • /
    • 2023
  • Y2SiO5 Powder based on silicon and yttrium is well known as powder phosphors due to their excellent sustainability and efficiency. A new electroluminescence device was fabricated with Y2SiO5:Eu3+ powder phosphors though a simple screen printing method. The powder-dispersed electroluminescence device consisted of the Y2SiO5:Eu3+ powder-dispersed phosphor layer and BaTiO3-dispersed dielectric layer. The annealing temperature of the phosphor for the best powder electroluminescence performance was optimized to high temperature in ambient atmosphere though a solid-state reaction. The Eu3+ concentration for the best device performance was also investigated and furthermore, the thermal dependence of the electroluminescence intensity was investigated at the operating voltage at 100℃, which is the Curie temperature of the BaTiO3 layer. And the intensity was exponentially increased with voltage and increased linearly with frequency.

  • PDF