• Title/Summary/Keyword: $H_2$ anneal

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Degradation of electrical characteristics in SOI nano-wire Bio-FET devices ($O_2$ plasma 표면 처리 공정에 의한 SOI nano-wire Bio-FET 소자의 전기적 특성 열화)

  • Oh, Se-Man;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.356-357
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    • 2008
  • The effects of $O_2$ plasma ashing process for surface treatment of nano-wire Bio-FET were investigated. In order to evaluate the plasma damage introduced by $O_2$ plasma ashing, a back-gate biasing method was developed and the electrical characteristics as a function of $O_2$ plasma power were measured. Serious degradations of electrical characteristics of nano-wire Bio-FET were observed when the plasma power is higher than 50 W. For curing the plasma damages, a forming gas anneal (2 %, $H_2/N_2$) was carried out at $400^{\circ}C$. As a result, the electrical characteristics of nano-wire Bio-FET were considerably recovered.

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Measurement of Interface Trapped Charge Densities $(D_{it})$ in 6H-SiC MOS Capacitors

  • Lee Jang Hee;Na Keeyeol;Kim Kwang-Ho;Lee Hyung Gyoo;Kim Yeong-Seuk
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.343-347
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    • 2004
  • High oxidation temperature of SiC shows a tendency of carbide formation at the interface which results in poor MOSFET transfer characteristics. Thus we developed oxidation processes in order to get low interface charge densities. N-type 6H-SiC MOS capacitors were fabricated by different oxidation processes: dry, wet, and dry­reoxidation. Gate oxidation and Ar anneal temperature was $1150^{\circ}C.$ Ar annealing was performed after gate oxidation for 30 minutes. Dry-reoxidation condition was $950^{\circ}C,$ H2O ambient for 2 hours. Gate oxide thickness of dry, wet and dry-reoxidation samples were 38.0 nm, 38.7 nm, 38.5 nm, respectively. Mo was adopted for gate electrode. To investigate quality of these gate oxide films, high frequency C- V measurement, gate oxide leakage current, and interface trapped charge densities (Dit) were measured. The interface trapped charge densities (Dit) measured by conductance method was about $4\times10^{10}[cm^{-1}eV^{-1}]$ for dry and wet oxidation, the lowest ever reported, and $1\times10^{11}[cm^{-1}eV^{-1}]$ for dry-reoxidation

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Low Resistivity Ohmic Co/Si/Ti Contacts to P-type 4H-SiC (Co/Si/Ti P형 4H-SiC 오옴성 접합에서 낮은 접촉 저항에 관한 연구)

  • Yang, S.J.;Lee, J.H.;Nho, I.H.;Kim, C.K.;Cho, N.I.;Jung, K.H.;Kim, E.D.;Kim, N.K.
    • Proceedings of the KIEE Conference
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    • 2001.11a
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    • pp.112-114
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    • 2001
  • In this letter, we report on the investigation of Si/Ti, Pt/Si/Ti, Co/Si/Ti Ohmic contacts to p-type 4H-SiC. The contacts were formed by a 2-step vacuum annealing at $550^{\circ}C$ for 5 min, $850^{\circ}C$ for 2 min respectively. The contact resistances were measured using the transmission line model method, which resulted in specific $10^{-4}{\Omega}cm^2$, and the physical properties of the contactcontact resistivities in the $9.2{\times}10^{-4}$, $7.1{\times}10^{-4}$ and $4.5{\times}s$ were examined using microscopy, AES(auger electron spectroscopy). AES analysis has shown that, at this anneal temperature, there was a intermixing of the Ti and Si, migration of into SiC. Overlayer of Pt, Co had the effect of decreasing the specific contact resistivity and improving the surface morphology of the annealed contact.

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Abnormal Coating Buildup on Si Bearing Steels in Zn Pot During Line Stop

  • Weimin Zhong;Rob Dziuba;Phil Klages;Errol Hilado
    • Corrosion Science and Technology
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    • v.23 no.2
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    • pp.83-92
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    • 2024
  • A hot-dip simulator was utilized to replicate abnormal coating buildup observed during line stops at galvanize lines, assessing the influence of processing conditions on buildup (up to 14 mm/side). Steel samples from 19 coils (comprising IF, BH, LCAK, HSLA, DP600-DP1180, Si: 0.006 - 0.8 wt%, P: 0.009 - 0.045 wt%) were examined to explore the phenomenon of heavy coating growth. It was discovered that heavy coating buildup (~3 mm/h) and rapid strip dissolution (~0.17 mm/h) in a GA or GI pot can manifest with specific combinations of steel chemistry and processing conditions. The results reveal the formation of a unique coating microstructure, characterized by a blend of bulky Zeta crystals and free Zn pockets/networks due to the "Sandlin" growth mechanism. Key variables contributing to abnormal coating growth include steel Si content, anneal temperature, dew point in heating and soaking furnaces, Zn pot temperature, Zn bath Al%, and cold-rolling reduction%. At ArcelorMittal Dofasco galvanize lines, an automatic online warning system for operators and special scheduling for incoming Si-bearing steels have been implemented, effectively preventing further heavy buildup occurrences.

Effects of Wafer Cleaning and Heat Treatment in Glass/Silicon Wafer Direct Bonding (유리/실리콘 기판 직접 접합에서의 세정과 열처리 효과)

  • 민홍석;주영창;송오성
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.6
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    • pp.479-485
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    • 2002
  • We have investigated the effects of various wafers cleaning on glass/Si bonding using 4 inch Pyrex glass wafers and 4 inch silicon wafers. The various wafer cleaning methods were examined; SPM(sulfuric-peroxide mixture, $H_2SO_4:H_2O_2$ = 4 : 1, $120^{\circ}C$), RCA(company name, $NH_4OH:H_2O_2:H_2O$ = 1 : 1 : 5, $80^{\circ}C$), and combinations of those. The best room temperature bonding result was achieved when wafers were cleaned by SPM followed by RCA cleaning. The minimum increase in surface roughness measured by AFM(atomic force microscope) confirmed such results. During successive heat treatments, the bonding strength was improved with increased annealing temperatures up to $400^{\circ}C$, but debonding was observed at $450^{\circ}C$. The difference in thermal expansion coefficients between glass and Si wafer led debonding. When annealed at fixed temperatures(300 and $400^{\circ}C$), bonding strength was enhanced until 28 hours, but then decreased for further anneal. To find the cause of decrease in bonding strength in excessively long annealing time, the ion distribution at Si surface was investigated using SIMS(secondary ion mass spectrometry). tons such as sodium, which had been existed only in glass before annealing, were found at Si surface for long annealed samples. Decrease in bonding strength can be caused by the diffused sodium ions to pass the glass/si interface. Therefore, maximum bonding strength can be achieved when the cleaning procedure and the ion concentrations at interface are optimized in glass/Si wafer direct bonding.

Electrical Characteristics of Ni/Ti/Al Ohmic Contacts to Al-implanted p-type 4H-SiC (Al 이온 주입된 p-type 4H-SiC에 형성된 Ni/Ti/Al Ohmic Contact의 전기적 특성)

  • Joo, Sung-Jae;Song, Jae-Yeol;Kang, In-Ho;Bahng, Wook;Kim, Sang-Cheol;Kim, Nam-Kyun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.11
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    • pp.968-972
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    • 2008
  • Ni/Ti/Al multilayer system ('/'denotes the deposition sequence) was tested for low-resistance ohmic contact formation to Al-implanted p-type 4H-SiC. Ni 30 nm / Ti 50 nm / Al 300 nm layers were sequentially deposited by e-beam evaporation on the 4H-SiC samples which were implanted with Al (norminal doping concentration = $4\times10^{19}cm^{-3}$) and then annealed at $1700^{\circ}C$ for dopant activation. Rapid thermal anneal (RTA) temperature for ohmic contact formation was varied in the range of $840\sim930^{\circ}C$. Specific contact resistances were extracted from the measured current vs. voltage (I-V) data of linear- and circular transfer length method (TLM) patterns. In constrast to Ni contact, Ni/Ti/Al contact shows perfectly linear I-V characteristics, and possesses much lower contact resistance of about $2\sim3\times10^{-4}\Omega{\cdot}cm^2$ even after low-temperature RTA at $840^{\circ}C$, which is about 2 orders of magnitude smaller than that of Ni contact. Therefore, it was shown that RTA temperature for ohmic contact formation can be lowered to at least $840^{\circ}C$ without significant compromise of contact resistance. X-ray diffraction (XRD) analysis indicated the existence of intermetallic compounds of Ni and Al as well as $NiSi_{1-x}$, but characteristic peaks of $Ti_{3}SiC_2$, a probable narrow-gap interfacial alloy responsible for low-resistance Ti/Al ohmic contact formation, were not detected. Therefore, Al in-diffusion into SiC surface region is considered to be the dominant mechanism of improvement in conduction behavior of Ni/Ti/Al contact.

Optical Properties of Hydrogenated Amorphous Chalcogenide Thin Films (수소화 처리된 비정질 칼코게나이드 박막의 광학적 특성)

  • Nam Gi-Yeon;Kim Jun-Hyung;Cho Sung-June;Lee Hyun-Yong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.5
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    • pp.450-456
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    • 2006
  • In this paper, we report the changes of morphology, transmittance and photoluminescence (PL) in hydrogenated amorphous $As_{40}Ge_{10}Se_{15}S_{35}$ thin films, thermally deposited at the vapor incidence angles (${\theta}$) of $0^{\circ},\;45^{\circ}\;and\;80^{\circ}$. The hydrogenation was carried out under the condition of a $H_2$ pressure ($P_H$) of 20 atm and an annealing temperature range, $T_{Anneal}$ of $150^{\circ}C{\sim}210^{\circ}C$. A columnar structures with an inclination angle of approximately $65{\sim}70^{\circ}$ was formed in $80^{\circ}$-deposited films and then the columnar was broken after hydrogenation. Transmittance increases with an increase of deposition angle and by the hydrogenation. In particular, a broad PL band on the extended region is observed in obliquely deposited films and it increases during the hydrogenation.

Conduction Properties of NitAI Ohmic Contacts to AI-implanted p-type 4H-SiC (AI 이온 주입된 p-type 4H-SiC에 형성된 Ni/AI 오믹접촉의 전기 전도 특성)

  • Joo, Seong-Jae;Song, Jae-Yeol;Kang, In-Ho;Bahng, Wook;Kim, Sang-Cheol;Kim, Nam-Kyun;Lee, Yong-Jae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.9
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    • pp.717-723
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    • 2009
  • Ni/Al ('/' denotes deposition sequence) contacts were deposited on Al-implanted 4H-SiC for ohmic contact formation, and the conduction properties were characterized and compared with those of Ni-only contacts. The thicknesses of the Ni and Al thin film were 30 nm and 300 nm, respectively, and the films were sequentially deposited bye-beam evaporation without vacuum breaking. Rapid thermal anneal (RTA) temperature was varied as follows : $840^{\circ}C$, $890^{\circ}C$, and $940^{\circ}C$. The specific contact resistivity of the Ni contact was about $^{\sim}2\;{\pm}\;10^{-2}\;{\Omega}{\cdot}cm^2$, However, with the addition of Al overlayer, the specific contact resistivity decreased to about $^{\sim}2\;{\pm}\;10^{-4}\;{\Omega}{\cdot}cm^2$, almost irrespective of RTA temperature. X-ray diffraction (XRD) analysis of the Ni contact confirmed the existence of various Ni silicide phases, while the results of Ni/Al contact samples revealed that Al-contaning phases such as $Al_3Ni$, $Al_3Ni_2$, $Al_4Ni_3$, and $Ab_{3.21}Si_{0.47}$ were additionally formed as well as the Ni silicide phases. Energy dispersive spectroscopy (EDS) spectrum showed interfacial reaction zone mainly consisting of Al and Si at the contact interface, and it was also shown that considerable amounts of Si and C have diffused toward the surface. This indicates that contact resistance lowering of the Ni/Al contacts is related with the formation of the formation of interfacial reaction zone containing Al and Si. From these results, possible mechanisms of contact resistance lowering by the addition of Al were discussed.

Study of plasma induced charging damage and febrication of$0.18\mu\textrm{m}$dual polysilicon gate using dry etch (건식각을 이용한 $0.18\mu\textrm{m}$ dual polysilicon gate 형성 및 plasma damage 특성 평가)

  • 채수두;유경진;김동석;한석빈;하재희;박진원
    • Journal of the Korean Vacuum Society
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    • v.8 no.4A
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    • pp.490-495
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    • 1999
  • In 0.18 $\mu \textrm m$ LOGIC device, the etch rate of NMOS polysilicons is different from that of PMOS polysilicons due to the state of polysilicon to manufacture gate line. To control the etch profile, we tested the ratio of $Cl_2$/HBr gas and the total chamber pressure, and also we reduced Back He pressure to get the vertical profile. In the case of manufacturing the gate photoresist line, we used Bottom Anti-Reflective Coating (BARC) to protect refrection of light. As a result we found that $CF_4O_2$ gas is good to etch BARC, because of high selectivity and good photoresist line profile after etching BARC. in the results of the characterization of plasma damage to the antenna effect of gate oxide, NO type thin film(growing gate oxide in 0, ambient followed by an NO anneal) is better than wet type thin film(growing gate oxide in $0_2+H_2$ ambient).

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Reduction Gas and Chemical Additive Effects on the MOCVD Copper Films Deposited From (hfac)Cu(1,5-DMCOD) as a Precursor ((hfac)Cu(1,5-DMCOD) 전구체를 이용한 MOCVD Cu 증착 특성에 미치는 환원기체와 첨가제의 영향에 관한 연구)

  • Byeon, In-Jae;Seo, Beom-Seok;Yang, Hui-Jeong;Lee, Won-Hui;Lee, Jae-Gap
    • Korean Journal of Materials Research
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    • v.11 no.1
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    • pp.20-26
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    • 2001
  • The deposition characteristics of MOCVO Cu using the (hfac)Cu(I) (1,5-DMCOD)(1,1,1,5,5,5-hexafluoro-2,4-pentanedionato Cu(I) 1,5-dimethyl-cyclooctadine) as a precursor have been investigated in terms of the effects of hydrogen and H(hfac) ligand addition with He carrier gas. MOCVD Cu using a Helium carrier gas showed a low deposition rate (20~$125{\AA}/min$) at the substrate temperature range of 180~$230^{\circ}C$. Moreover, the Cu film deposited at 19$0^{\circ}C$ was very thin (~$700{\AA}$) and showed the lowest resistivity value of $2.8{\mu}{\Omega}-cm$. The deposition rate of MOCVD Cu using $H_2$or H(hfac) addition was significantly enhanced especially at the low temperature region (180~$190^{\circ}C$). Furthermore, thinner Cu films (~$500{\AA}$) provided low resistivity (3.6~$2.86{\mu}{\Omega}-cm$). From surface reflectance measurement, very thin films deposited by using different gas system revealed good surface morphology comparable with sputtered Cu film ($300^{\circ}C$, vacuum-anneal). Hence, Cu film using (hfac)Cu(1,5-DMCOD) as a precursor is expected as a good seed layer in the electrochemical deposition process for Cu metallization.

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