Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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Architecture Improvement of Analog-Digital Converter for High-Resolution Low-Power Sensor Systems

고해상도 저전력 센서 시스템을 위한 아날로그-디지털 변환기의 구조 개선

  • Shin, Youngsan (School of Electronic Engineering and Research Institute of Future Automobile, Soongsil University) ;
  • Lee, Seongsoo (School of Electronic Engineering and Research Institute of Future Automobile, Soongsil University)
  • Received : 2018.04.29
  • Accepted : 2018.05.29
  • Published : 2018.06.30
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Abstract

In sensor systems, ADC (analog-to-digital converter) demands high resolution, low power consumption, and high signal bandwidth. Sigma-delta ADC achieves high resolution by high order structure and high over-sampling ratio, but it suffers from high power consumption and low signal bandwidth. SAR (successive-approximation-register) ADC achieves low power consumption, but there is a limitation to achieve high resolution due to process mismatch. This paper surveys architecture improvement of ADC to overcome these problems.

센서 시스템의 아날로그-디지털 변환기(ADC: analog-to-digital converter)에서는 높은 해상도, 낮은 전력 소모, 높은 신호 대역폭이 요구된다. 시그마-델타 ADC는 높은 차수 구조와 높은 오버샘플링 비를 통해 고해상도를 얻을 수 있으나 전력 소모가 높고 신호 대역폭이 낮다. 연속 근사 레지스터(SAR: successive-approximation-register) ADC의 경우 저전력 동작이 가능하나 공정상 부정합으로 인해 해상도에 한계가 있다. 본 논문에서는 이러한 단점들을 극복하기 위한 ADC 구조 개선에 대해 살펴본다.

Keywords

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