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CABAC 부호화기를 위한 고속 이진 산술 부호화기의 설계

Design of High Speed Binary Arithmetic Encoder for CABAC Encoder

  • Park, Seungyong (Department of Information Communication Engineering, Hanbat National University) ;
  • Jo, Hyungu (Department of Information Communication Engineering, Hanbat National University) ;
  • Ryoo, Kwangki (Department of Information Communication Engineering, Hanbat National University)
  • 투고 : 2017.01.16
  • 심사 : 2017.02.11
  • 발행 : 2017.04.30

초록

본 논문은 HEVC의 엔트로피 코딩방법인 CABAC 부호화기를 위한 효율적인 이진 산술 부호화기 하드웨어 구조를 제안한다. CABAC은 HEVC 표준에서 사용되는 엔트로피 코딩 방법으로 통계적 중복성을 제거하여 영상의 높은 압축률을 지원한다. 하지만 이진 산술 부호화(Binary Arithmetic Encode)는 데이터 간의 의존 관계가 높아 병렬처리가 어렵고 실시간 처리의 지연이 발생 된다. 제안하는 이진 산술 부호화기는 입력으로 들어오는 빈을 고속으로 처리하기 위하여 재정규화 과정을 분리 시켜 동작하도록 설계한다. 기존의 반복적인 알고리즘을 병렬적으로 처리함으로써 최대지연시간(Critical Path)을 최적으로 줄일 수 있는 4단계의 파이프라인 구조로 설계하였다. 또한, 멀티-빈 구조를 적용하여 클록 사이클 당 3개의 빈을 처리한다. 제안하는 CABAC의 이진 산술 부호화기는 Verilog-HDL로 설계하였으며 65nm 공정으로 합성하였다. 합성 결과 게이트수는 8.07K 이며 최대 동작주파수는 769MHz로 최대 빈 처리량은 2307Mbin/s이다. 제안하는 하드웨어 구조는 기존의 이진 산술 부호화기와 비교하여 최대 빈 처리량이 26% 만큼 증가 하였다.

This paper proposes an efficient binary arithmetic encoder hardware architecture for CABAC encoding, which is an entropy coding method of HEVC. CABAC is an entropy coding method that is used in HEVC standard. Entropy coding removes statistical redundancy and supports a high compression ratio of images. However, the binary arithmetic encoder causes a delay in real time processing and parallel processing is difficult because of the high dependency between data. The operation of the proposed CABAC BAE hardware structure is to separate the renormalization and process the conventional iterative algorithm in parallel. The new scheme was designed as a four-stage pipeline structure that can reduce critical path optimally. The proposed CABAC BAE hardware architecture was designed with Verilog HDL and implemented in 65nm technology. Its gate count is 8.07K and maximum operating speed of 769MHz. It processes the four bin per clock cycle. Maximum processing speed increased by 26% from existing hardware architectures.

키워드

참고문헌

  1. G. J. Sullivan, J.-R. Ohm, W.-J. Han, and T. Wiegand, "Overview of the High Efficiency Video Coding (HEVC) Standard," IEEE Transactions on Circuits and System for Video Technology, vol. 22, no. 12, pp. 1649-1668, Dec. 2012. https://doi.org/10.1109/TCSVT.2012.2221191
  2. Joint Video Team, Draft IUT-T Recommendation and Final Draft International Standard of Joint Video Specification, IUT-T Rec. H.264 and ISO/IEC 14496-10 AVC, 2003.
  3. V. Sze, and M. Budagavi, "High Throughput CABAC Entropy Coding in HEVC," IEEE Transactions on Circuits and System for Video Technology, vol. 22, no. 12, pp. 1755-1764, Dec. 2012. https://doi.org/10.1109/TCSVT.2012.2221529
  4. J. Myoung, and K. Ryoo, "The Hardware Design of CABAC for High Performance H.264 Encoder," Journal of the Korea Institute of Information and Communication Engineering, vol. 16, no. 4, pp. 771-777, Apr. 2012. https://doi.org/10.6109/jkiice.2012.16.4.771
  5. H. Kim, and K. Ryoo, "The Hardware Design of High throughput CABAC Decoder for HEVC," Journal of the Korea Institute of Information and Communication Engineering, vol. 17, no. 2, pp. 385-390, Feb. 2013. https://doi.org/10.6109/jkiice.2013.17.2.385
  6. J. Moon, Y. Kim, and S. Lee, "Design of an Efficient Binary Arithmetic Encoder for H.264/AVC," Journal of the Institute of Electronics Engineers of Korea-SD, vol.46, no.12, pp. 66-72, Dec. 2009.
  7. J.-W. Chen, L.-C. Wu, P.-S. Liu, and Y.-L. Lin, "A high-throughput fully hardwired CABAC encoder for QFHD H.264/AVC main profile video," IEEE Transactions on Consumer Electronics. vol. 56, no. 4, pp. 2529-2536, Nov. 2010. https://doi.org/10.1109/TCE.2010.5681137
  8. W. Fei, D. Zhou, and S. Goto, "A 1 Gbin/s CABAC encoder for H.264/AVC," in European Signal Processing Conference, pp. 1524-1528, Sep. 2011.
  9. B. Peng, D. Ding, X. Zhu, and L. Yu, "A hardware CABAC encoder for HEVC," in Processing IEEE International Symposium on Circuits and Systems, pp. 1372- 1375, May 2013.
  10. D. Zhou, J. Zhou, W. Fei, and S. Goto, "Ultra-High Throughput VLSI Architecture of H.265/HEVC CABAC Encoder for UHDTV Applications," IEEE Transactions on Circuits and System for Video Technology, vol. 25, no. 3, pp. 497-507, Mar. 2015. https://doi.org/10.1109/TCSVT.2014.2337572