한국산업정보학회논문지 (Journal of Korea Society of Industrial Information Systems)

한국산업정보학회 (Korea Society of Industrial Information Systems)
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플립플롭 기반의 새로운 노화 센싱 회로의 설계 및 구현

Design and Implementation of a new aging sensing circuit based on Flip-Flops

  • 이진경 (대구대학교 전자공학과) ;
  • 김경기 (대구대학교 전자전기공학부)
  • 투고 : 2014.04.30
  • 심사 : 2014.07.30
  • 발행 : 2014.08.30
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초록

본 논문에서는 나노미티 기술에서 HCI와 BTI와 같은 노화 현상에 의해 야기되는 MOSFET 디지털 회로의 실패를 정확히 예측을 위한 플립플롭 기반의 온-칩 노화 센싱 회로를 제안한다. 제안된 센싱 회로는 순차회로의 가드밴드 (guardband) 위반에 대한 경고를 나타내는 타이밍 윈도우를 이용해서 노화에 의한 회로의 동작 실패 전에 경고 비트를 발생한다. 발생된 비트는 고신뢰의 시스템 설계를 위한 적응형 셀프-튜닝 방법에서 제어 신호로 사용될 것이다. 노화 센싱 회로는 0.11um CMOS 기술을 사용해서 구현되었고, 파워-게이팅 구조를 가지는 $4{\times}4$ 곱셈기에 의해서 평가되었다.

In this paper, a new on-chip aging sensing circuit based on flip-flops is proposed to detect a circuit failure of MOSFET digital circuits casued by aging phenomenon such as HCI and BTI. The proposed circuit uses timing windows to warn against a guardband violation of sequential circuits, and generates three warning bits right before circuit failures occur. The generated bits can apply to an adaptive self-tuning method for reliable system design as control signals. The aging sensor circuit has been implemented using 0.11um CMOS technology and evaluated by $4{\times}4$ multiplier with power gating structure.

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참고문헌

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