전자공학회논문지 (Journal of the Institute of Electronics and Information Engineers)

  • 제50권4호
  • /
  • Pages.239-245
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  • 2013
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  • 2287-5026(pISSN)
  • /
  • 2288-159X(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
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멀티 레벨 낸드 플레쉬 메모리에서 주변 셀 상태에 따른 데이터 유지 특성에 대한 연구

Study of Data Retention Characteristics with surrounding cell's state in a MLC NAND Flash Memory

  • 최득성 (영남이공대학교 전자정보계열) ;
  • 최성운 (영남이공대학교 전자정보계열) ;
  • 박성계 (SK하이닉스(주) 연구소)
  • 투고 : 2013.02.04
  • 발행 : 2013.04.25
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초록

멀티 레벨 낸드 플레쉬 메모리에서 주위 셀의 문턱 전압상태에 따른 데이터 유지 특성을 연구하였다. 열을 가해 셀의 데이터 보전특성을 판정하는 열적 열하 특성에서 주목하는 셀의 문턱 전압이 변화하는데 문턱전압의 변화는 선택된 셀 주위에 있는 셀들이 가장 낮은 문턱 전압 상태로 있는 셀들의 수가 많을수록 커진다. 그 이유는 전하의 손실이 이루어지는 낸드 플레쉬 셀의 본질적인 특성 뿐 아니라, 주위 셀 사이의 측면 전계 때문이다. 전계에 대한 모사 결과로부터 전계의 증가 현상을 발견할 수 있고, 이로 인한 전하의 손실이 소자 스케일 다운에 따라 더 증가함을 알 수 있다.

The data retention characteristics depending on neighbor cell's threshold voltage (Vt) in a multilevel NAND flash memory is studied. It is found that a Vt shift (${\Delta}Vt$) of the noted cell during a thermal retention test is increased as the number of erase-state (lowest Vt state) cells surrounding the noted cell increases. It is because a charge loss from a floating gate is originated from not only intrinsic mechanism but also lateral electric field between the neighboring cells. From the electric field simulation, we can find that the electric field is increased and it results in the increased charge loss as the device is scaled down.

키워드

참고문헌

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