대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

Ge mole fraction에 따른 SGOI MOSFET의 아날로그 특성

Analog performances of SGOI MOSFET with Ge mole fraction

  • 이재기 (가천의과학대학교 정보공학부) ;
  • 김진영 (인천대학교 전자공학과) ;
  • 조원주 (광운대학교 전자재료공학과) ;
  • 박종태 (인천대학교 전자공학과)
  • Lee, Jae-Ki (Dept. of Information Engineering, Gachon Univ. of Medicine and Science) ;
  • Kim, Jin-Young (Dept. of Electronics Engineering, Univ. of Incheon) ;
  • Cho, Won-Ju (Dept. of Electronic Materials Engineering, Kwangwoon University) ;
  • Park, Jong-Tae (Dept. of Electronics Engineering, Univ. of Incheon)
  • 투고 : 2011.04.05
  • 심사 : 2011.05.02
  • 발행 : 2011.05.25
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초록

본 연구에서는 $Si_xGe_{1-x}$ 버퍼층 위에 성장된 strained-Si에 Ge 농도에 따라 n-MOSFET를 제작하고 소자 제작 후의 열처리 온도에 따른 소자의 아날로그 성능을 측정 분석하였다. 전자의 유효 이동도는 Ge 농도가 증가함에 따라 증가하였으나 32%로 높을 때에는 열처리 온도에 상관없이 오히려 감소하는 것으로 측정되었다. 상온에서 Ge 농도가 증가함에 따라 증가 소자의 아날로그 성능 지수가 우수하였으나 32% 농도에서는 오히려 좋지 않았다. 고온에서 strained-Si의 전자 유효이동도 저하가 Si보다 심하기 때문 SGOI 소자의 아날로그 성능 저하가 SOI 소자보다 심한 것을 알 수 있었다.

In this work, the analog performances of n-MOSFET fabricated on strained-Si/relaxed Si buffer layer with Ge mole fractions and thermal annealing temperatures after device fabrication have been characterized in Depth. The effective electron mobility was increased with the increase of Ge mole fraction for all annealing temperatures. However the effective electron mobility was decreased at the Ge mole fraction of 32%. The analog performances were enhanced with the increase of Ge mole fraction at the room temperature but they were degraded at the Ge mole fraction of 32%. Since the degradation of the effective electron mobility of strained-Si layer is more significant than one of conventional Si layer at elevated temperature, the degradation of analog performances of SGOI devices were increased than those of SOI devices.

키워드

참고문헌

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