DOI QR코드

DOI QR Code

Rail-to-Rail의 입력 신호 범위를 가지는 12-bit 1MS/s 축차비교형 아날로그-디지털 변환기

A 12-bit 1MS/s SAR ADC with Rail-to-Rail Input Range

  • 김두연 (고려대학교 마이크로/나노협동과정) ;
  • 정재진 (고려대학교 전기전파공학과) ;
  • 임신일 (서경대학교 컴퓨터공학과) ;
  • 김석기 (고려대학교 전기전자전파공학부)
  • 발행 : 2010.02.01

초록

As CMOS technology continues to scale down, signal processing is favorably done in the digital domain, which requires Analog-to-Digital (A/D) Converter to be integrated on-chip. This paper presents a design methodology of 12-bit 1-MS/s Rail-to-Rail fully differential SAR ADC using Deep N-well Switch based on binary search algorithm. Proposed A/D Converter has the following architecture and techniques. Firstly, chip size and power consumption is reduced due to split capacitor array architecture and charge recycling method. Secondly, fully differential architecture is used to reduce noise between the digital part and converters. Finally, to reduce the mismatch effect and noise error, the circuit is designed to be available for Rail-to-Rail input range using simple Deep N-well switch. The A/D Converter fabricated in a TSMC 0.18um 1P6M CMOS technology and has a Signal-to-Noise-and-Distortion-Ratio(SNDR) of 69 dB and Free-Dynamic-Range (SFDR) of 73 dB. The occupied active area is $0.6mm^2$.

키워드

참고문헌

  1. Gilbert Promitzer, "12-bit Low-Power Fully Differential Switched Capacitor Noncalibrating Successive Approximation ADC with 1 MS/s,"IEEE J. Solid-State Circuits, vol. 36, no. 7, pp. 176-179, Sept. 2000.
  2. B. Ginsburg and A. Chandrakasan, "An Energy-Efficient Charge Recycling Approach for a SAR Converter with Capacitive DAC," Proc. IEEEISCAS, vol.1,pp.184–187, May 2005.
  3. Brian P. Ginsburg,Student Member, IEEE, and Anantha P.Chandrakasan, "500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC," IEEE J. Solid-State Circuits, vol. 42, No. 4, Apr. 2007.
  4. Jeong-Sup Lee and In-Cheol Park, "Capacitor Array Structure and Switch Control for Energy-Efficient SAR Analog-to-Digital Converters," Proc. IEEE ISCAS,vol.1,pp.236-239, May 2008
  5. Rudy van de Plassche, "CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters 2nd Edition,"KluwerAcademicPublishers,pp.1-105,pp.244-254.